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Performance optimization of MOS-like carbon nanotube-FETs with realistic source/drain contacts based on electrostatic doping

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Journal of Semiconductors 2010年第12期31卷 43-48页

作者：周海亮郝跃张民选 School of Computer National University of Defense Technology School of Microelectronics Xidian University

Due to carrier band-to-band-tunneling （BTBT） through channel-source/drain contacts, conventional MOS- like Carbon Nanotube Field Effect Transistors （C-CNFETs） suffer from ambipolar conductance, which deteriorates the device performance greatly. In order to reduce such ambipolar behavior, a novel device structure based on electrostatic doping is proposed and all kinds of source/drain contacting conditions are considered in this paper. The non-equilibrium Green＇s function （NEGF） formalism based simulation results show that, with proper choice of tuning voltage, such electrostatic doping strategy can not only reduce the ambipolar conductance but also improve the sub-threshold perfor- mance, even with source/drain contacts being of Schottky type. And these are both quite desirable in circuit design to reduce the system power and improve the frequency as well. Further study reveals that the performance of the proposed design depends strongly on the choice of tuning voltage value, which should be paid much attention to obtain a proper trade-off between power and speed in application.

关键词： sub-threshold slope ambipolar conductance electrostatic doping BTBT Schottky contact CNFET

Design and optimization analysis of dual material gate on DG-IMOS

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Journal of Semiconductors 2017年第12期38卷 48-55页

作者： Sarabdeep Singh Ashish Ramant Naveen Kumar Department of Electronics and Communication Engineering Dr.B.R.Ambedkar National Institute of TechnologyJalandhar 144011India

An impact ionization MOSFET （IMOS） is evolved for overcoming the constraint of less than 60 mV/decade sub-threshold slope （SS） of conventional MOSFET at room temperature. In this work, first, the device performance of the p-type double gate impact ionization MOSFET （DG-IMOS） is optimized by adjusting the device design parameters. The adjusted parameters are ratio of gate and intrinsic length, gate dielectric thickness and gate work function. Secondly, the DMG （dual material gate） DG-IMOS is proposed and investigated. This DMG DG-IMOS is further optimized to obtain the best possible performance parameters. Simulation results reveal that DMG DG-IMOS when compared to DG-IMOS, shows better IoN, ION/IoFF ratio, and RF parameters. Results show that by properly tuning the lengths of two materials at a ratio of 1.5 in DMG DG-IMOS, optimized perform- ance is achieved including ION/IoFF ratio of 2.87 × 10^9 A/μm with/ON as 11.87 × 10^-4 A/μm and transconductance of 1.06× 10^-3 S/μm. It is analyzed that length of drain side material should be greater than the length of source side material to attain the higher transconductance in DMG DG-IMOS.

关键词： impact ionization MOSFET (IMOS) avalanche breakdown sub-threshold slope dual material gate (DMG) biosensor

Characteristics of a 0.1μm SOI Grooved Gate pMOSFET

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Journal of Semiconductors 2005年第11期26卷 2080-2084页

作者：邵红旭孙宝刚吴峻峰钟兴华中国科学院微电子研究所北京100029

A 0. 1μm SOI grooved gate pMOSFET with 5.6nm gate oxide is fabricated and demonstrated. The groove depth is 180nm. The transfer characteristics and the output characteristics are shown. At Vds = -1. 5V,the drain saturation current is 380μA and the off-state leakage current is 1.9nA;the sub-threshold slope is 115mV/dec at Vds = -0. 1V and DIBL factor is 70. 7mV/V. The electrical characteristic comparison between the 0.1μm SOI groovedgate pMOSFET and the 0. 1μm bulk grooved gate one with the same process demonstrates that a 0. 1μm SOI grooved gate pMOSFET has better characteristics in current-driving capability and sub-threshold slope.

关键词： SOI grooved gate pMOSFET sub-threshold slope

A Novel Fully-Depleted Dual-Gate MOSFET

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Journal of Semiconductors 2007年第9期28卷 1359-1363页

作者：张国和邵志标韩彬刘德瑞西安交通大学电子科学与技术系西安710049

A novel fully-depleted dual-gate MOSFET with a hetero-material gate and a lightly-doped drain is proposed. The hetero-material gate, which consists of a main gate and two side-gates,is used to control the surface potential distribution. The fabrication process and the device characteristics are simulated with Tsuprem-4 and Medici separately. Compared to a common DG fully depleted SO1 MOSFET,the proposed device has much higher on/off current ratio and superior sub-threshold slope. The on/off current ratio is about 10^10 and the sub-threshold slope is nearly 60mV/dec under a 0.18μm process.

关键词： hetero-material gate on/off current ratio sub-threshold slope SOI FET