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Effects of Unintended Dopants on I-V Characteristics of the double-gate MOSFETs,a Simulation Study

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Communications in Theoretical Physics 2012年第7期58卷 171-174页

作者：李佩成梅光辉胡光喜王伶俐刘冉汤庭鳌 State Key Laboratory of ASIC and System School of Information Science and TechnologyFudan University

In this paper, we study the effects of an unintended dopant in the channel on the current-voltage char-acteristics of a double-gate (DG) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). Non-Equilibrium Green's Function (NEGF) approach is used. A quantum transport model to calculate the drain current is presented and subthreshold swing and drain induced barrier lowering (DIBL) effect are studied.

关键词： current-voltage characteristics double gate MOSFET unintended dopant

DC and analog/RF performance of C-shaped pocket TFET(CSP-TFET)with fully overlapping gate

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Chinese Physics B 2022年第5期31卷 711-719页

作者： Zi-Xin Chen Wei-Jing Liu Jiang-Nan Liu Qiu-Hui Wang Xu-Guo Zhang Jie Xu Qing-Hua Li Wei Bai Xiao-Dong Tang College of Electronics and Information Engineering Shanghai University of Electric PowerShanghai 200090China GTA Semiconductor Corporation Limited Shanghai 200123China Key Laboratory of Polar Materials and Devices East China Normal UniversityShanghai 200041China

A C-shaped pocket tunnel field effect transistor(CSP-TFET)has been designed and optimized based on the traditional double-gate TFETs by introducing a C-shaped pocket region between the source and channel to improve the device performance.A gate-to-pocket overlapping structure is also examined in the proposed CSP-TFET to enhance the gate *** effects of the pocket length,pocket doping concentration and gate-to-pocket overlapping structure on the DC and analog/RF characteristics of the CSP-TFET are estimated after calibrating the tunneling model in double-gate *** DC and analog/RF performance such as on-state current(Ion),on/off current ratio(Ion/Ioff),subthreshold swing(SS)transconductance(g;),cut-off frequency(f_(T))and gain-bandwidth product(GBP)are *** optimized CSPTFET device exhibits excellent performance with high I_(off)(9.98×10^(-4)A/μm),high I_(on)/I_(off)(~10^(11)),as well as low SS(~12 m V/dec).The results reveal that the CSP-TFET device could be a potential alternative for the next generation of semiconductor devices.

关键词： tunnel field effect transistor double gate pocket

A unified charge-based model for SOI MOSFETs applicable from intrinsic to heavily doped channel

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Chinese Physics B 2012年第4期21卷 478-485页

作者：张健何进周幸叶张立宁马玉涛陈沁张勖凯杨张王睿斐韩雨陈文新 Tera-Scale Research Centre(TSRC) School of Electronics Engineering and Computer Science(EECS)Peking UniversityBeijing 100871China Peking University Shenzhen System on Chip(SOC)Key Laboratory PKU-HKUST Shenzhen-Hongkong InstitutionW303West TowerIER BldgHi-Tech Industrial Park SouthShenzhen 518057China Department of Electronics and Computer Engineering(ECE) Hong Kong University of Science and TechnologyKowloonClearwater BayHong KongChina

A unified charge-based model for fully depleted silicon-on-insulator （SOI） metal oxide semiconductor field-effect transistors （MOSFETs） is presented. The proposed model is accurate and applicable from intrinsic to heavily doped channels with various structure parameters. The framework starts from the one-dimensional Poisson Boltzmann equa- tion, and based on the full depletion approximation, an accurate inversion charge density equation is obtained. With the inversion charge density solution, the unified drain current expression is derived, and a unified terminal charge and intrinsic capacitance model is also derived in the quasi-static case. The validity and accuracy of the presented analytic model is proved by numerical simulations.

关键词： charge-based model silicon-on-insulator metal-oxide semiconductor field-effect transis- tors compact model double gate

A review on performance comparison of advanced MOSFET structures below 45 nm technology node

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Journal of Semiconductors 2020年第6期41卷 19-28页

作者： Namrata Mendiratta Suman Lata Tripathi School of Electronics and Electrical Engineering Lovely Professional UniversityPhagwaraPunjabIndia

CMOS technology is one of the most frequently used technologies in the semiconductor industry as it can be successfully integrated with *** two years the number of MOS transistors doubles because the size of the MOSFET is *** the size of the MOSFET reduces the size of the channel length which causes short channel effects and it increases the leakage *** reduce the short channel effects new designs and technologies are *** gate MOSFET design has shown improvement in performance as amplifiers over a single ***-based MOSFET design can be used in a harsh *** has been used in various applications such as in detecting *** increase in number of gates increases the current drive capability of *** MOSFET is an example of a quadruple gate around the four sides of channel that increases gate control over the channel *** also increases effective channel width that improves drain current and reduces leakage current keeping short channel effects under *** MOSFET operates faster and uses less power with increase in ON-state current leading to a good value of ION/IOFF *** this paper,several gate and channel engineered MOSFET structures are analyzed and compared for sub 45 nm technology node.A comparison among different MOSFET structures has been made for subthreshold performance parameters in terms of IOFF,subthreshold slope and DIBL *** analog/RF performance is analyzed for transconductance,effective transistor capacitances,stability factor and critical *** paper also covers different applications of advance MOSFET structures in analog/digital or IoT/biomedical applications.

关键词： MOSFET junctionless RF biosensor DIBL double gate