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英特尔看重集成芯片 2000年推出“system-on-a-chip”

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每周电脑报

每周电脑报 1999年第21期 9-9页

6月1日获悉:英特尔公司将在2000年晚些时候推出自己的“system-on-a-chip”集成芯片产品。据称,这种叫做“Timna”的芯片将包括一个赛扬处理器核心、一个图形单元和一个内存控制器,该产品将使

关键词：集成芯片 system-on-a-chip 英特尔公司

Towards functional verifying a family of systemC TLMs

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Frontiers of Computer Science 2020年第1期14卷 53-66页

作者： Tun LI Jun YE Qingping TAN College of Computer National University of Defense TechnologyChangsha 410073China Laboratory of Software Engineering for Complex systems Changsha 410073China Jiangnan Institute of Computing Technology Wuxi 214083China

It is often the case that in the development of a system-on-a-chip(SoC)design,a family of systemC transaction level models(TLM)is *** in the same family often share common functionalities but differ in their timing,implementation,configuration and performance in various SoC developing *** most cases,all the TLMs in a family must be verified for the follow-up design *** our previous work,we proposed to call such family TLM product line(TPL),and proposed feature-oriented(FO)design methodology for efficient TPL ***,developers can only verify TLM in a family one by one,which causes large portion of duplicated verification ***,in our proposed methodology,functional verification of TPL has become a *** this paper,we proposed a novel TPL verification method for FO *** our method,for the given property,we can exponentially reduce the number of TLMs to be verified by identifying mutefeature-modules(MFM),which will avoid duplicated *** proposed method is presented in informal and formal way,and the correctness of it is *** theoretical analysis and experimental results on a real design show the correctness and efficiency of the proposed method.

关键词： system-on-a-chip transaction level model systemC feature-oriented functional verification

Hardware-Software Co-Simulation for SOC Functional Verification

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Journal of Beijing Institute of Technology 2005年第2期14卷 121-125页

作者：严迎建刘明业 School of Information Science and Technology Beijing Institute of Technology Beijing100081 ChinaSchool of Electronic Technology PLA Information Engineering University Zhengzhou450004 China School

A hardware-software co-simulation method for system on chip (SOC) design is discussed. It is based on an instruction set simulator (ISS) and an event-driven hardware simulator, and a bus interface model that is described in C language provides the interface between the two. The bus interface model and the ISS are linked into a singleton program--the software simulator, which communicate with the hardware simulator through Windows sockets. The implementation of the bus interface model and the synchronization between hardware and software simulator are discussed in detail. Co-simulation control of the hardware simulator is also discussed.

关键词： system-on-a-chip co-simulation instruction set simulator event-driven hardware simulator

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ShiftEquivalenceImpliesTopologicalEquivalenceforSomeAnosovEndomorphisms

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Tsinghua Science and Technology 1996年第3期1卷 48-50页

作者：章梅荣 Department of Applied Mathematics Tsinghua University Beijing 100084

ＳｈｉｆｔＥｑｕｉｖａｌｅｎｃｅＩｍｐｌｉｅｓＴｏｐｏｌｏｇｉｃａｌＥｑｕｉｖａｌｅｎｃｅｆｏｒＳｏｍｅＡｎｏｓｏｖＥｎｄｏｍｏｒｐｈｉｓｍｓ＊ＺｈａｎｇＭｅｉｒｏｎｇ（章梅荣）ＤｅｐａｒｔｍｅｎｔｏｆＡｐｐｌｉｅｄ... 详细信息

ＳｈｉｆｔＥｑｕｉｖａｌｅｎｃｅＩｍｐｌｉｅｓＴｏｐｏｌｏｇｉｃａｌＥｑｕｉｖａｌｅｎｃｅｆｏｒＳｏｍｅＡｎｏｓｏｖＥｎｄｏｍｏｒｐｈｉｓｍｓ＊ＺｈａｎｇＭｅｉｒｏｎｇ（章梅荣）ＤｅｐａｒｔｍｅｎｔｏｆＡｐｐｌｉｅｄＭａｔｈｅｍａｔｉｃｓ，Ｔｓｉｎｇ...

关键词： Manifolds Frequency modulation Equations Bismuth system-on-a-chip Agricultural machinery Topology Author Keywords Anosov endomorphism shift equivalence topological equivalence weak topdogical equivalence

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Extraction and Applications of On-chip Interconnect Inductance

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Extraction and Applications of On-Chip Interconnect Inductan...

2004 7th International Conference on Solid-State and Integrated Circuits Technology（ICSICT 2004）

作者： S.Simon Wong So-Young Kim C.Patrick Yue Richard Chang Frank O'Mahony Center for Integrated systems Stanford UniversityStanford CA Department of Electrical and Computer Engineering Carnegie Mellon UniversityPittsburgh PA 'MIT Lincoln Lab. LexingtonMA

＜正＞Inductance associated with on-chip wires can no longer be ignored as chip operation frequencies increase into GHz *** the magnetic field propagates a long range,the wire inductance is not just dependent on the immediate neighboring *** paper discusses the difficulty of extracting inductance in a typical chip environment.A screening and extraction algorithm is described to identify wires with significant inductive *** a dedicated current return path, the wire inductance can be controlled and benefit the design of high-speed *** examples are illustrated.

关键词： Inductance Wire Frequency Circuit simulation Application software Integrated circuit interconnections system-on-a-chip Magnetic fields Impedance Distortion

Framework of Converting C++ Class to Hardware

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Framework of Converting C++ Class to Hardware

2008 9th International Conference on Solid-State and Integrated-Circuit Technology

作者： Zhao Xueming Zhou Xuegong Wang Lingli* State Key Laboratory of ASIC & system Fudan University Shanghai 201203 P. R. China State Key Laboratory of ASIC ＆ system Fudan University

In recent SOPC （system on Programmable chip） design, a system becomes very complex and the cost of modifying the design during the development becomes very expensive. Based on the technology of the C to HDL （Hardware Description Language）, we propose a framework to convert C++ class to hardware, which can be used to cope with the change of design requirement during the development period. Within this framework, software and hardware components can be switched to each other easily, and can be reused between different projects as an object-oriental component.

关键词： [IEEE Keyword]Joining processes Hardware design languages Field programmable gate arrays system-on-a-chip Coprocessors Software Hardware

The Study of HW/SW Co-verification on ARM-Prototype system

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The Study of HW/SW Co-verification on ARM-Prototype System

2008 9th International Conference on Solid-State and Integrated-Circuit Technology

作者： Guozhang Wang Qiaolin Shi Zhiguo Yu Zongguang Yu School of Information Engineering Jiangnan University China Electronics Technology Group Corporation No 58 Research Institute

＜正＞With the ever-increasing complexity and the cost on SoC’s verification,more attentions are paid to the Hardware/Software *** this paper,two HW/SW co-verification methods are compared between virtual-prototype machine and HW-board platform.A hardware platform on ARM-prototype system for an application-specific SoC’s HW/SW co-verification is implemented complied with software design and *** function of the SoC has been verified on the developed platform.

关键词： [IEEE Keyword]Real time systems Hardware design languages Software Hardware Field programmable gate arrays system-on-a-chip Prototypes

Hardware-Software Cosynthesis of Multitask MPSoCs with Real-Time Constraints

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Hardware-Software Cosynthesis of Multitask MPSoCs with Real-...

2005 6th International Conference on ASIC

作者： Choonseung Lee Soonhoi Ha The CAP Laboratory School of Computer Science and EngineeringSeoul National UniversityKorea

＜正＞The cosynthesis problem addressed in this paper involves three subproblems:selection of appropriate processing elements, mapping and scheduling of function blocks to the selected processing elements,and schedulability *** have presented a cosynthesis framework in our earlier work[1]that defines an iteration loop of three steps that attack the subproblems *** many good features,our previous technique has a severe restriction that a task monopolizes the entire system once *** in general we may obtain higher performance if multiple tasks can be running concurrently on different processor *** is the main contribution of this paper that we extend the previous framework to be applicable for general multiprocessor systems with diverse operating *** demonstrate the performance improvement from the proposed work with a multi-media real-time application,DVR system,and randomly generated multi-task graphs.

关键词： Processor scheduling system-on-a-chip Hardware Multiprocessing systems Real time systems Time factors Libraries Space exploration Computer architecture Laboratories

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用于SOC测试的一种有效的BIST方法

电子器件 2007年第4期30卷 1152-1154页

作者：须自明刘战王国章于宗光江南大学信息工程学院江苏无锡214000 中国电子科技集团第五十八研究所江苏无锡214035

为了提高SOC芯片的可测性和可靠性,我们提出了一种SOC测试的BIST技术的实现方案.针对某所自行研制的数字模拟混合信号SOC芯片,我们使用了不同的可测性技术.比如对模拟模块使用改进的BIST方法,对嵌入式存储器使用了MBIST技术.一系列的测... 详细信息

为了提高SOC芯片的可测性和可靠性,我们提出了一种SOC测试的BIST技术的实现方案.针对某所自行研制的数字模拟混合信号SOC芯片,我们使用了不同的可测性技术.比如对模拟模块使用改进的BIST方法,对嵌入式存储器使用了MBIST技术.一系列的测试实验数据表明,该BIST方法能有效提高测试覆盖率.

关键词： system-on-a-chip BIST

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