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Hardware-Software Co-Simulation for SOC Functional Verification

Hardware-Software Co-Simulation for SOC Functional Verification

作     者:严迎建 刘明业 

作者机构:School of Information Science and Technology Beijing Institute of Technology Beijing100081 ChinaSchool of Electronic Technology PLA Information Engineering University Zhengzhou450004 China School 

出 版 物:《Journal of Beijing Institute of Technology》 (北京理工大学学报(英文版))

年 卷 期:2005年第14卷第2期

页      面:121-125页

核心收录:

学科分类:080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术(可授工学、理学学位)] 08[工学] 

基  金:SponsoredbytheMinisterialLevelFoundation(K410B066) 

主  题:system-on-a-chip co-simulation instruction set simulator event-driven hardware simulator 

摘      要:A hardware-software co-simulation method for system on chip (SOC) design is discussed. It is based on an instruction set simulator (ISS) and an event-driven hardware simulator, and a bus interface model that is described in C language provides the interface between the two. The bus interface model and the ISS are linked into a singleton program--the software simulator, which communicate with the hardware simulator through Windows sockets. The implementation of the bus interface model and the synchronization between hardware and software simulator are discussed in detail. Co-simulation control of the hardware simulator is also discussed.

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