Study of Integrator Performance Based on Hybrid SETMOS

作     者：Li Cai,is with the Department of Electronic Sciences,Sciences Institute,Air Force Engineering University of CPLA,China.Qiang Kang is with the Science Research Department,Air Force Engineering University of CPLA,China Dang-Yuan Shi was with the Department of Electronic Sciences,Sciences Institute,Air Force Engineering University of CPLA,China 

会议名称：《2011 Chinese Control and Decision Conference（CCDC）》

会议日期：2011年

学科分类：080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 080501[工学-材料物理与化学] 0805[工学-材料科学与工程（可授工学、理学学位）] 080502[工学-材料学] 

基　　金：supported by the National High Technology Research and Development Program of China (Project code:2008AAJ225) Research Fund of Shaanxi Key Laboratory of Electronic Information System Integration (Project code:201115Y15) 

关 键 词：Single Electron Transistor (SET) SETMOS Integrator Transmission Performance SPICE 

摘      要：With the integration of integrated circuits continues to rise,the feature size of integrated devices has entered *** electron transistor （SET） is satisfied as nanoelectronic devices,and the SET will be mixed with the composition of nano-MOS devices （SETMOS）,is one of the hot current *** as a new hybrid device combine the advantages of both,it also has the same Coulomb oscillation characteristics with the SET and MOS high *** analog signal processing filters as the basic unit circuit,it must conform to the development of the *** on the I V characteristics of a SETMOS hybrid device model,a SETMOS integrator is designed,and expounding it’s the operating condition,structure,performance,parameter and *** transmission performance of the integrator designed is simulated by *** conclusion is proved by simulation result.