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High Performance P-Channel Schottky Barrier MOSFETs with Self-Aligned PtSi Source/Drain on Thin Film SOI Substrate

有薄电影 SOI 底层上的自我排列的 PtSisource/drain 的高效 P 隧道 Schottky 障碍 MOSFET

作     者:竺士炀 李名复 

作者机构:DepartmentofMicroelectronicsFudanUniversityShanghai200433//SiliconNanoDeviceLaboratoryDepartmentofElectricMandComputerEngineeringNationalUniversityofSingaporeSingapore119260 SiliconNanoDeviceLaboratoryDepartmentofElectricMandComputerEngineeringNationalUniversityofSingaporeSingapore119260 

出 版 物:《Chinese Physics Letters》 (中国物理快报(英文版))

年 卷 期:2005年第22卷第8期

页      面:2020-2022页

核心收录:

学科分类:080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术(可授工学、理学学位)] 08[工学] 080501[工学-材料物理与化学] 0805[工学-材料科学与工程(可授工学、理学学位)] 080502[工学-材料学] 

基  金:国家自然科学基金 

主  题:FIELD-EFFECT TRANSISTOR METAL GATE CONTACTS DESIGN DRAIN 

摘      要:P-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) withPtSi Schottky barrier source/drain, high-k gate dielectric and metal gate electrode were fabricatedon a thin p-type silicon-on-insulator (SOI) substrate using a simplified low temperature *** device works on a fully-depleted accumulation-mode and has an excellent electrical *** reaches I-on/I-off ratio of about 10(7), subthreshold swing of 65mV/decade and saturation draincurrent of I-ds = 8.8 mu A/mu m at vertical bar V-g - V(th)vertical bar = vertical bar V(d)verticalbar = 1 V for devices with the channel length 4.0 mu m and the equivalent oxide thickness *** to the corresponding bulk-Si counterparts, SOI p-SBMOSFETs have smaller off-state currentdue to reduction of the PtSi/Si contact area.

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