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检索条件"主题词=very large scale integration"
11 条 记 录,以下是1-10 订阅
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A novel interconnect optimal buffer insertion model considering the self-heating effect
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Journal of Semiconductors 2013年 第11期34卷 118-123页
作者: 张岩 董刚 杨银堂 王宁 丁尧舜 刘晓贤 王凤娟 Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials Devices Microelectronics InstituteXidian University
Considering the self-heating effect, an accurate expression for the global interconnection resistance per unit length in terms of interconnection wire width and spacing is presented. Based on the proposed resistance m... 详细信息
来源: 维普期刊数据库 维普期刊数据库 同方期刊数据库 同方期刊数据库 评论
Effect of electric field on metallic SWCNT interconnects for nanoscale technologies
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Journal of Semiconductors 2015年 第3期36卷 92-98页
作者: Harsimran Kaur Karamjit Singh Sandha Department of Electronics and Communication Engineering Thapar University
The influence of an electric field on metallic single walled carbon nanotube (SWCNT) interconnects is studied. A voltage-dependent equivalent circuit model is presented for the impedance parameters of single-wall ca... 详细信息
来源: 维普期刊数据库 维普期刊数据库 同方期刊数据库 同方期刊数据库 评论
Analytical-BEM coupling method for fast 3-D interconnect resistance extraction
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Frontiers of Electrical and Electronic Engineering in China 2006年 第2期1卷 239-243页
作者: WANG Xi-ren YU Wen-jian WANG Ze-yi EDA Lab Dept.Computer Science and technologyTsinghua UniversityBeijing 100084China
Deep submicron process technology is widely being used and interconnect structures are becoming more and more *** means that the resistance calculation based on two-dimensional models can no longer provide sufficientl... 详细信息
来源: 维普期刊数据库 维普期刊数据库 评论
Neural Network Based VLSI Power Estimation
Neural Network Based VLSI Power Estimation
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2006 8th International Conference on Solid-State and Integrated Circuit Technology
作者: Ligang Hou Liping Zheng Wuchen Wu VLSI & System Lab Beijing University of Technology
<正>This paper forwards a neural network based method on VLSI power *** estimation technique was a tradeoff between precision and *** based power estimation gave the most accurate result but time ***-Carlo[1][2]and ... 详细信息
来源: cnki会议 评论
A Scalable Design of RSA Crypto-coprocessor
A Scalable Design of RSA Crypto-coprocessor
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2006 8th International Conference on Solid-State and Integrated Circuit Technology
作者: Yehua Gu Xiaoyang Zeng Jun Han Yongxin Ma Jia Zhao State Key Lab of ASIC & System Fudan University
<正>A scalable design of RSA Crypto-coprocessor is presented in this paper,which supports variable keys up to 4096- *** analyzing and improving the modified multiple-word Montgomery multiplication algorithm,its pipe... 详细信息
来源: cnki会议 评论
Low Power Wide Dominos Design in sub-65nm CMOS Technologies
Low Power Wide Dominos Design in sub-65nm CMOS Technologies
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2006 8th International Conference on Solid-State and Integrated Circuit Technology
作者: Jinhui Wang Na Gong Ligang Hou Limin Dong Wuchen Wu VLSI & System Lab Beijing University of Technology College of Electronic and Informational Engineering Hebei University
<正>Two novel low power wide OR domino designs are presented in this *** the same delay time,the two designed dominos decrease the active power by 8.92%to 17.25%and 13.79%to 25.84%as compared to the standard dual V,... 详细信息
来源: cnki会议 评论
Efficient VLSI Design and Implementation of Integer Motion Estimation for H.264 SDTV Encoder
Efficient VLSI Design and Implementation of Integer Motion E...
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2006 8th International Conference on Solid-State and Integrated Circuit Technology
作者: Chun-Gan Peng Dun-Shan Yu Xi-Xin Cao Shi-Min Sheng SoC Lab. Department of MicroelectronicsPeking University
<正>In this paper,the VLSI hardware complexity for H.264 integer motion estimation is analyzed,several hardware-reduction techniques are investigated and a Sot-SAD-Tree VLSI structure based on SAD-Tree is *** this S... 详细信息
来源: cnki会议 评论
Reconfigurable VLSI Architecture for VBSME in MPEG-4 AVC/H.264
Reconfigurable VLSI Architecture for VBSME in MPEG-4 AVC/H.2...
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2005 6th International Conference on ASIC
作者: Cao Wei Mao Zhi Gang Microelectronics Center Harbin Institute of Technology
<正>VBSME is adopted in the MPEG-4 AVC /H.264 *** this paper,we proposed a new reconfigurable VLSI architecture for VBSME with 3 levels of computing complexity to support FS and fast search area sub-sampling ME *** ... 详细信息
来源: cnki会议 评论
Self-correcting FSM Architecture Implementation Based on Convolutional Code
Self-correcting FSM Architecture Implementation Based on Con...
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2006 8th International Conference on Solid-State and Integrated Circuit Technology
作者: Ming Li Jian-Wei Gu Jia-Lin Cao Feng Ran Yong Shao Microelectronic Research and Development Center Shanghai University
<正>We discuss the use of convolutional code to implement single fault tolerant Finite State Machines (FSMs) in VLSI *** order to correct the fault,we propose a novel scheme which can simultaneously detect and cor... 详细信息
来源: cnki会议 评论
Parallelized VLSI Architecture of Single Stack based List Sphere Decoder
Parallelized VLSI Architecture of Single Stack based List Sp...
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2006 8th International Conference on Signal Processing
作者: Hyoung-Soon Kim Sang-Ho Seo Sin-Chong Park Information and Communications Universitv(ICU) DaeieonKorea
In this paper,we proposed a revised scaled-QR decomposition and corresponding VLSI architecture for the List Sphere Decoder(LSD).This architecture uses real-valued channel matrix and received vector. The average decod... 详细信息
来源: cnki会议 评论