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Fast measurement and prediction method for electromagnetic susceptibility of receiver

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Journal of Systems Engineering and Electronics 2024年第2期35卷 275-285页

作者： CHEN Yan LU Zhonghao LIU Yunxia State Key Laboratory of Complex Electromagnetic Environment Effects on Electronics and Information System College of Electronic Science and TechnologyNational University of Defense TechnologyChangsha 410073China State Key Laboratory of Astronautic Dynamics Xi’an 710043China

Aiming at evaluating and predicting rapidly and accurately a high sensitivity receiver’s adaptability in complex electromagnetic environments,a novel testing and prediction method based on dual-channel multi-frequency is proposed to improve the traditional two-tone ***,two signal generators are used to generate signals at the radio frequency(RF)by frequency scanning,and then a rapid measurement at the intermediate frequency(IF)output port is carried out to obtain a huge amount of sample data for the subsequent ***,the IF output response data are modeled and analyzed to construct the linear and nonlinear response constraint equations in the frequency domain and prediction models in the power domain,which provide the theoretical criteria for interpreting and predicting electromagnetic susceptibility(EMS)of the *** experiment performed on a radar receiver confirms the reliability of the method proposed in this *** shows that the interference of each harmonic frequency and each order to the receiver can be identified and predicted with the sensitivity *** on this,fast and comprehensive evaluation and prediction of the receiver’s EMS in complex environment can be efficiently realized.

关键词： electromagnetic susceptibility(EMS) receiver dualchannel multi-frequency nonlinear response frequency domain power domain

A 434/868 MHz CMOS low-IF receiver with I/Q imbalance calibration for SRDs application

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Journal of Semiconductors 2009年第3期30卷 97-103页

作者：李娟赵冯叶国敬洪志良 State Key Laboratory of ASIC & System Fudan University

A receiver for SRDs implemented by the 0.35μm CMOS process is presented. The receiver, together with the ADC, power amplifier （PA）, frequency synthesizer and digital baseband has been integrated into a single chip solution. Low cost and low power requirements are met by optimizing the receiver architecture and circuit topology. A simple mixed-signal mode I/Q imbalance calibration circuit is proposed to enhance the IRR （image rejection ratio） so as to raise the BER. From a single 3 V power supply, the receiver consumes 5.9 mA. The measurement result shows that the receiver achieves reference sensitivity of-60 dBm and a control gain of 60 dB. The S11 reaches -20 dB at 433 MHz and -10 dB at 868 MHz without off-chip impedance match network. The die area is only 2 mm^2 including the bias circuit.

关键词： short range device low-power low-cost receiver I/Q imbalance calibration

Analysis and design of a 1.8-2.7 GHz tunable 8-band TDD LTE receiver front-end

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Journal of Semiconductors 2011年第5期32卷 104-110页

作者：王肖王玉吉王伟威常学贵闫娜谈熙闵昊 State Key Laboratory of ASIC & System Fudan University

This paper describes the analysis and design of a 0.13 #m CMOS tunable receiver front-end that supports 8 TDD LTE bands, covering the 1.8-2.7 GHz frequency band and supporting the 5/10/15/20 MHz bandwidth and QPSK/16QAM/64QAM modulation schemes. The novel zero-IF receiver core consists of a tunable narrow- band variable gain low-noise amplifier （LNA）, a current commutating passive down-conversion mixer with a 2nd order low pass trans-impedance amplifier, an LO divider, a rough gain step variable gain pre-amplifier, a tunable 4th order Chebyshev channel select active-RC low pass filter with cutoff frequency calibration circuit and a fine gain step variable gain amplifier. The LNA can be tuned by reconfiguring the output parallel LC tank to the responding frequency band, eliminating the fixed center frequency multiple LNA array for a multi-mode receiver. The large various gain range and bandwidth of the analog baseband can also be tuned by digital configuration to satisfy the specification requirement of various bandwidth and modulation schemes. The test chip is implemented in an SMIC 0.13μm 1PSM CMOS process. The full receiver achieves 4.6 dB NF, -14.5 dBm out of band IIP3, 30-94 dB gain range and consumes 54 mA with a 1.2 V power supply.

关键词： long-term evolution receiver tunable CMOS

One photon-per-bit receiver using near-noiseless phase-sensitive amplification

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Light(Science & Applications) 2020年第1期9卷 543-549页

作者： Ravikiran Kakarla Jochen Schroder Peter A.Andrekson Photonics Laboratory Department of Microtechnology and Nanoscience(MC2)Chalmers University of Technology412-96 GothenburgSweden

Space communication for deep-space missions,inter-satellite data transfer and Earth monitoring requires high-speed data *** reach is fundamentally dictated by the available transmission power,the aperture size,and the receiver sensitivity.A transition from radio-frequency links to optical links is now seriously being considered,as this greatly reduces the channel loss caused by diffraction.A widely studied approach uses power-efficient formats along with nanowire-based photon-counting receivers cooled to a few Kelvins operating at speeds below 1 Gb/***,to achieve the multi-Gb/s data rates that will be required in the future,systems relying on pre-amplified receivers together with advanced signal generation and processing techniques from fibre communications are also *** sensitivity of such systems is largely determined by the noise figure(NF)of the pre-amplifier,which is theoretically 3 dB for almost all ***-sensitive optical amplifiers(PSAs)with their uniquely low NF of 0 dB promise to provide the best possible sensitivity for Gb/s-rate long-haul free-space ***,we demonstrate a novel approach using a PSA-based receiver in a free-space transmission experiment with an unprecedented bit-error-free,black-box sensitivity of 1 photon-per-information-bit(PPB)at an information rate of 10.5 Gb/*** system adopts a simple modulation format(quadrature-phase-shift keying,QPSK),standard digital signal processing for signal recovery and forward-error correction and is straightforwardly scalable to higher data rates.

关键词： receiver amplifier noise

A 10 Gb/s receiver with half rate period calibration CDR and CTLE/DFE combiner

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Journal of Semiconductors 2009年第4期30卷 106-112页

作者：高茁杨宗仁赵莹杨袆张璐黄令仪胡伟武 Institute of Computing Technology Chinese Academy of Sciences Graduate University of the Chinese Academy of Sciences

This paper presents the design of a 10 Gb/s low power wire-line receiver in the 65 nm CMOS process with 1 V supply voltage. The receiver occupies 300×500 μm2. With the novel half rate period calibration clock data recovery （CDR） circuit, the receiver consumes 52 mW power. The receiver can compensate a wide range of channel loss by combining the low power wideband programmable continuous time linear equalizer （CTLE） and decision feedback equalizer （DFE）.

关键词： serial link receiver CDR equalizer

Mathematical analyses of the GPS receiver interference tolerance and mean time to loss lock

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Defence Technology（防务技术） 2019年第3期15卷 440-449页

作者： Ehab M.Shaheen Sherif A.Elgamel Electronic Warfare Department Military Technical College

In this paper, novel mathematical expressions are derived for the Global Positioning System (GPS) receiver interference tolerance in the presence of different types of interference signals such as: continuous wave interference, narrowband interference, partial band interference, broadband interference, match spectrum interference and pulse interference. Also, in this paper the mean time to loss lock is determined in order to analyse the mentioned interferences effect on the GPS receiver. These derived analytical expressions are validated with the aid of extensive simulation experiments.

关键词： Mathematical analyses GPS receiver interference tolerance

A Low-Power Low-Cost 780MHz CMOS FSK receiver for Short-Range Wireless Communication

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Chinese Journal of Electronics 2016年第2期25卷 220-226页

作者： YIN Yadong YANG Yuanting ZHANG Lihong College of Physics and Information Engineering Fuzhou University Fujian Polytechnic of Information Technology Fujian Jiangxia University

This paper presents a low-power low-cost780 MHz CMOS Frequency shift keying(FSK) receiver for short-range wireless communication. A current-reused Low power amplifier(LNA) and a single-balance passive mixer are employed to cut down the current consumption of the RF frontend in receiver. A 3rd-order active-RC complex filter with reconfigurable bandwidth is implemented and a novel automatic tuning circuit is used in the filter to eliminate the negative effect of the Process, voltage, temperature(PVT) variations. A novel replica-circuit master-slave automatic tuning circuit and a discrete-time differentiator are employed in demodulator to keep the demodulation performances from the PVT variations and the frequency offset of Intermediate frequency(IF). The receiver is fabricated in 0.18μm CMOS and occupies a chip area of about 0.97mm2. It can achieve a sensitivity of –83.7d Bm and a tolerance of IF range from 1.5MHz to 3.7MHz with a 4.7m A current consumption under a 1.8V supply.

关键词： CMOS integrated circuit Current reused Frequency offset tolerance Frequency shift keying(FSK) demodulation Low power receiver

An energy detection receiver for non-coherent IR-UWB

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Journal of Semiconductors 2011年第6期32卷 96-103页

作者：蔡力黄鲁傅忠谦杨静儿王卫东 Department of Electronic Science and Technology University of Science and Technology of China

A non-coherent receiver for impulse radio ultra-wide band（IR-UWB）is *** proposed receiver front-end consists of a high gain LNA,a high frequency detector and an intermediate frequency（IF）amplifier to amplify the recovered signal and drive an external test *** meet the requirements of high gain and a low noise figure（NF）under moderate power consumption for the LNA,capacitor cross coupled（CCC）and current reuse techniques were *** detector consists of a squarer and an *** overall circuit consumes 41.2mA current with a supply voltage of 1.8 V at a 400 MHz pulse *** resulting energy efficiency is 0.19 nJ/pulse.A chip prototype is implemented in 0.18-μm *** die area is 2.1×1.4 mm^2 and the active area is 1.7×0.98 mm^2.

关键词： receiver IR-UWB non-coherent LNA detector

Thermal Analysis of a Volumetric Solar receiver

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Journal of Thermal Science 2019年第6期28卷 1176-1185页

作者： CHEN Longfei YANG Ming LI Jinping BAI Yakai LI Xiaoxia TANG Wenxue YANG Nancong WANG Zhifeng Lanzhou University of Technology Lanzhou 730050China Key Laboratory of Solar Thermal Energy and Photovoltaic Systems Chinese Academy of SciencesBeijing 100190China Institute of Electrical Engineering Chinese Academy of SciencesBeijing 100190China University of Chinese Academy of Sciences Beijing 100049China Beijing Engineering Research Center of Solar Thermal Power Beijing 100190China Beijing CSP International Cooperation Centre Beijing 100190China Joint Laboratory Institute of Electrical EngineeringChinese Academy of Sciences and Guangdong Five Star Solar Energy Co.Ltd.Beijing 100190China Guangdong 5 Star Solar Energy CO.LTD Dongguan 523051China

The volumetric receiver has received wide attention due to its high thermal efficiency. This paper studied a new type of a solid-liquid composite volumetric receiver. The heat transfer in a solid-liquid composite volumetric solar receiver was analyzed using a one-dimensional unsteady simulation model of the solid-liquid receiver. The model included absorption of the incident solar radiation by the glass window, the silicon carbide porous ceramic heat absorber panel and the water. The results were verified against experimental data for a volumetric receiver and the error did not exceed 10%. It can be used to predict the heat transfer in solid-liquid composite volumetric receivers.

关键词： solar receiver solid-liquid composite absorber silicon carbide porous ceramic volumetric solar collector