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All-Digital phase locked loop for Clock Recovery

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All-Digital Phase Locked Loop for Clock Recovery

Lock threshold deterioration induced by antenna vibration and signal coupling effects in hypersonic vehicle carrier tracking system of Ka band

ICEMI'2005第七届国际电子测量与仪器学术会议

作者： Huang Wei Tao Cheng (School of Electronics and Information Engineering Beijing Jiaotong University Beijing China)

A first-order all-digital phase locked loop for clock recovery is presented in this paper. The circuit is realized by EP1K50QC208-3, which is a kind of FPGA made by ALTERA, and all the components of t

关键词： phase locked loop FPGA clock and data recovery circuit.

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Chinese Journal of Aeronautics 2018年第4期31卷 776-781页

作者： Congying ZHU Lei SHI Xiaoping LI Yanming LIU Wei AI School of Aerospace Science and Technology Xidian University

The envelope of a hypersonic vehicle is affected by severe fluctuating pressure, which causes the airborne antenna to vibrate slightly. This vibration mixes with the transmitted signals and thus introduces additional multiplicative phase noise. Antenna vibration and signal coupling effects as well as their influence on the lock threshold of the hypersonic vehicle carrier tracking system of the Ka band are investigated in this study. A vibration model is initially established to obtain phase noise in consideration of the inherent relationship between vibration displacement and electromagnetic wavelength. An analytical model of the phase-locked loop（PLL）, which is widely used in carrier tracking systems, is established. The coupling effects on carrier tracking performance are investigated and quantitatively analyzed by imposing the multiplicative phase noise on the PLL model. Simulation results show that the phase noise presents a Gaussian distribution and is similar to vibration displacement variation. A large standard deviation in vibration displacement exerts a significant effect on the lock threshold. A critical standard deviation is observed in the PLL of Binary phase Shift Keying（BPSK） and Quadrature phase Shift Keying（QPSK） signals. The effect on QPSK signals is more severe than that on BPSK signals. The maximum tolerable standard deviations normalized by the wavelength of the carrier are 0.04 and 0.02 for BPSK and QPSK signals,respectively. With these critical standard deviations, lock thresholds are increased from à12 andà4 d B to 3 and à2 d B, respectively.

关键词： Antenna vibration Carrier tracking performance Lock threshold phase locked loop Tracking Telemetry and Command(TT&C) signals

Low C/N_0 Carrier Tracking loop Based on Optimal Estimation Algorithm in GPS Software Receivers

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Chinese Journal of Aeronautics 2010年第1期23卷 109-116页

作者： Miao Jianfeng Chen Wu Sun Yongrong Liu Jianye Navigation Research Center College of Automation Engineering Nanjing University of Aeronautics and AstronauticsNanjing 210016 China Department of Land Surveying and Geo-informatics Hong Kong Polytechnic UniversityHong Kong China

Suppressing jitter noises in a phase locked loop（ PLL） is of great importance in order to keep precise and continuous track of global positioning system （GPS）signals characterized by low carrier-to-noise ratio（ C/No ）. This article proposes and analyzes an improved Kalman-filter-based PLL to process weak carrier signals in GPS software receivers. After reviewing the optimal-bandwidth-based traditional second-order PLL, a Kalman-filter-based estimation algorithm is implemented for the new PLL by decorrelating the model error noises and the measurement noises. Finally,the efficiency of this new Kalman-filter-based PLL is verified by experimental data. Compared to the traditional second-order PLL, this new PLL is in position to make correct estimation of the carrier phase differences and Doppler shifts with less overshoots and noise disturbances and keeps an effective check on the disturbances out of jitter noises in PLL. The results show that during processing normal signals,this improved PLL reduces the standard deviation from 0. 010 69 cycle to 0. 007 63 cycle, and for weak signal processing,the phase jitter range and the Doppler shifts can be controlled within ± 17° and ±5 Hz as against ±25° and ＋ 15 Hz by the traditional PLL.

关键词： global positioning system signal processing Kalman filters software radio phase locked loop

A wideband frequency synthesizer for a receiver application at multiple frequencies

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Journal of Semiconductors 2010年第3期31卷 80-84页

作者：王小松黄水龙陈普锋雷牡敏李志强张海英 Institute of Microelectronics Chinese Academy of Sciences

An integer-N frequency synthesizer for a receiver application at multiple frequencies was implemented in 0.18μm 1P6M CMOS technology. The synthesizer generates 2.57 GHz, 2.52 GHz, 2.4 GHz and 2.25 GHz local signals for the receiver. A wide-range voltage-controlled oscillator （VCO） based on a reconfigurable LC tank with a binaryweighted switched capacitor array and a switched inductor array is employed to cover the desired frequencies with a sufficient margin. The measured tuning range of the VCO is from 1.76 to 2.59 GHz. From the carriers of 2.57 GHz, 2.52 GHz, 2.4 GHz and 2.25 GHz, the measured phase noises are -122.13 dBc/Hz, -122.19 dBc/Hz, -121.8 dBc/Hz and -121.05 dBc/Hz, at 1 MHz offset, respectively. Their in-band phase noises are -80.09 dBc/Hz, -80.29 dBc/Hz, -83.05 dBc/Hz and -86.38 dBc/Hz, respectively. The frequency synthesizer including buffers consumes a total power of 70 mW from a 2 V power supply. The chip size is 1.5 × 1 mm2.

关键词： MOS phase locked loop frequency synthesizer multiple frequencies wideband phase noise

phase control of ellipsometric interferometer for nanometric positioning system

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Science China(Technological Sciences) 2011年第12期54卷 3424-3430页

作者： XU SuAn CHASSAGNE Luc TOPCU Suat ZHONG ShaoJun HUANG YanYan College of Mechanical and Electrical Engineering China Jiliang University Hangzhou 310018 China LISV University of Versailles Saint-Quentin Versailles cedex 78035 France

Development in industry is asking for improved resolution and higher accuracy in dimensional metrology. In this paper,we proposed a control displacement method based on a polarization ellipsometirc interferometer and phase-locked loop technique. The proposed principle was set up. The experimental results of step and step displacements with a step value of 5 nm were presented. We also analyzed the resolution,the potential minimal displacement of the established system. The results show that the position error induced by the ellipticty deviation of the light beam becomes negligible thanks to our signal processing circuit with high-order filter. This method could be useful for many applications in nano dimensional metrology and semiconductor industry.

关键词： ellipsometric interferometer phase locked loop nanometric position control displacement monitoring

Design and implementation of a clock recovery circuit for fast Ethernet applications

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Journal of Systems Engineering and Electronics 2004年第4期15卷 507-510页

作者： ZhuQuanqing ZouXuecheng ShenXubang InstituteforPatternRecognitionandArtificialIntelligence StateKeyLaboratoryforImageProcessingandIntelligentControlHuazhongUniversityofScienceandTechnologyWuhan430074P.R.China DepartmentofElectronicScienceandTechnology HuazhongUniversityofScienceandTechnologyWuhan430074P.R.China

A circuit architechure to realize clock recovery for fast Ethernet applications is presented, whick includies system architecture, modified MueUer Muller algorithm for 100BASE-TX, phase detector for 100BASE-TX and multiple output charge pump PLL. The clock recovery circuit is verified by TSMC 0.35um 1P5M CMOS process. The results show that this clock recovery circuit exactly extracts the timing information. It has advantages over others for simple and easy implementation.

关键词： adaptive equalize clock recovery phase locked loop

COMPASS time synchronization and dissemination—Toward centimetre positioning accuracy

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Science China(Physics,Mechanics & Astronomy) 2014年第9期57卷 1788-1804页

作者： WANG ZhengBo ZHAO Lu WANG ShiGuang ZHANG JianWei WANG Bo WANG LiJun NIM-THU Joint Institute for Measurement Science(JMI) Tsinghua University Department of Physics Tsinghua University Department of Applied Physics School of Physics and Nuclear Energy Engineering Beihang University Department of Precision Instruments & Mechanology Tsinghua University

In this paper we investigate methods to achieve highly accurate time synchronization among the satellites of the COMPASS global navigation satellite system(GNSS).Owing to the special design of COMPASS which implements several geo-stationary satellites(GEO),time synchronization can be highly accurate via microwave links between ground stations to the GEO *** as space-borne relay stations,the GEO satellites can further disseminate time and frequency signals to other satellites such as the inclined geo-synchronous(IGSO)and mid-earth orbit(MEO)satellites within the *** is shown that,because of the accuracy in clock synchronization,the theoretical accuracy of COMPASS positioning and navigation will surpass that of the *** addition,the COMPASS system can function with its entire positioning,navigation,and time-dissemination services even without the ground link,thus making it much more robust and *** further show that time dissemination using the COMPASS-GEO satellites to earth-fixed stations can achieve very high accuracy,to reach 100 ps in time dissemination and 3 cm in positioning accuracy,*** this paper,we also analyze two feasible synchronization *** special and general relativistic effects related to COMPASS clocks frequency and time shifts are *** conclude that COMPASS can reach centimeter-level positioning accuracy and discuss potential applications.

关键词： GNSS time and frequency Global Navigation Satellite System GNSS time synchronization time dissemination atomic clock phase locked loop relativity Geo-stationary satellites reference system

A PLL Clock Frequency Multiplier Using Dynamic Current Matching Adaptive Charge-Pump and VCO Frequency Reuse

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Wuhan University Journal of Natural Sciences 2007年第3期12卷 491-495页

作者： ZHANG Tao ZOU Xuecheng ZHAO Guangzhou SHEN Xubang College of Information Science and Engineering Wuhan University of Science and Technology Wuhan 430070 Hubei China Department of Electronic Science and Technology Huazhong University of Science and Technology Wuhan 430074 Hubei China Institute of Pattern Recognition and Artifical Intelligence Huazhong University of Science and Technology Wuhan 430074 Hubei China Xi＇an Microelectronic Technology Institute Xi＇an 710054 Shaanxi China

A 3.5 times PLL clock frequency multiplier for low voltage different signal （LVDS） driver is presented. A novel adaptive charge pump can automatically switch the loop bandwidth and a voltage-controlled oscillator （VCO） is designed with the aid of frequency ranges reuse technology. The circuit is implemented using 1st Silicon 0.25 μm mixed-signal complementary metal-oxide-semiconductor （CMOS） process. Simulation results show that the PLL clock frequency multiplier has very low phase noise and very short capture time .

关键词： low voltage different signal phase locked loop multiplier adaptive charge pump phase noise

Improved PLL Tuning of Shunt Active Power Filter for Grid Connected Photo Voltaic Energy System

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Circuits and Systems 2016年第10期7卷 3063-3080页

作者： Rajmohan Rajalakshmi Vairamani Rajasekaran Department of Electrical and Electronics Engineering Coimbatore Institute of Technology Coimbatore India Department of Electrical and Electronics Engineering PSNA College of Engineering and Technology Dindigul India

This research work brings out the unique predictive current control method for attaining an efficient grid connected Photo Voltaic (PV) system by Shunt Active Power Filter (SAPF) as grid connected converter. The major objective of the research work is to address the presence of Direct Current (DC) component, frequency improvement, quicker theta response, voltage magnitude estimation in the input signal of the phase locked loop (PLL) which is challenging. This work focuses on tuning the PLL block (Kp, Ki, Kv and Ko) through Artificial Bee Colony (ABC) optimization algorithm. The proposed ABC based modified three-phase PLL method is based on adding a new loop inside the PLL structure. In power converters, ABC algorithm is used to select the optimal switching states. The voltage vector which minimizes a cost optimization function is selected. Simulation is carried out for both balanced and unbalanced system and the results validate that the performance of the proposed approach is better in terms of harmonic compensation as per the IEEE standards within ±5%, power factor improvement of the system, quicker theta tracking and suppression of frequency jump with the interconnection of PV system.

关键词： Shunt Active Filter phase locked loop Artificial Bee Colony Current Control Method PV System