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A semi-empirical analytic model for threshold voltage instability in MOSFETs with high-k gate stacks

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Journal of Semiconductors 2009年第8期30卷 63-66页

作者：何进马晨月张立宁张健张兴 School of Computer & Information Engineering Shenzhen Graduate SchoolPeking University EECS School of Electronic Engineering and Computer SciencePeking University

A semi-empirical analytic model for the threshold voltage instability of a MOSFET is derived from Shockley-Read-Hall （SRH） statistics to account for the transient charging effects in a MOSFET high-k gate stack. Starting from the single energy level and single trap assumption, an analytical expression for the filled trap density in terms of dynamic time is derived from SRH statistics. The semi-empirical analytic model for the threshold voltage instability is developed based on MOSFET device physics between the threshold voltage and the induced trap density. The obtained model is also verified by extensive experimental data of trapping and de-trapping stress from different high-k gate configurations.

关键词： high-k gate stack nanoscale MOSFETs interface trap and charges trapping and detrapping threshold voltage dynamic behavior compact modeling

Continuous analyticⅠ-Ⅴmodel for GS DG MOSFETs including hot-carrier degradation effects

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Journal of Semiconductors 2012年第1期33卷 41-46页

作者： Toufik Bentrcia Faycal Djeffal Abdel Hamid Benhaya Department of Physics University of Batna Batna 05000Algeria LEA Department of Electronics University of BatnaBatna 05000Algeria

We have studied the influence of hot-carrier degradation effects on the drain current of a gate-stack double-gate （GS DG） MOSFET device. Our analysis is carried out by using an accurate continuous current-voltage （I-V） model, derived based on both Poisson＇s and continuity equations without the need of charge-sheet approxi- mation. The developed model offers the possibility to describe the entire range of different regions （subthreshold, linear and saturation） through a unique continuous expression. Therefore, the proposed approach can bring consid- erable enhancement at the level of multi-gate compact modeling including hot-carrier degradation effects.

关键词： GS DG MOSFET hot-carriers degradation effects compact modeling piece-wise models

BSIM--making the first international standard MOSFET model

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Science in China(Series F) 2008年第6期51卷 765-773页

作者： HU ChenMing Department of EECS University of California at Berkeley CA 94720 USA

BSIM （Berkeley Short-Channel IGFET） became the first international industry standard model for simulation of MOS integrated circuits in 1997. The cumulative sales of ICs that have been designed with the aid of BSIM and produced for computing, communication, consumer, and industrial applications is estimated to be around 400 billion US dollars. From 0.35μm CMOS to multi-gate FinFET, BSIM serves a wide range of technologies. Many China educated researchers have contributed to its success.

关键词： BSIM MOS compact modeling

BSIM Model Research and Recent Progress

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Journal of Semiconductors 2006年第3期27卷 388-396页

作者：何进陈文新奚雪梅宛辉品书阿里.力克纪达胡正明北京大学微电子学研究院北京100871 香港科技大学电子和电气工程系美国Berkeley加州大学电气和计算机科学工程系

The continued development of CMOS technology and the emergence of new applications demand continued improvement and enhancement of compact models. This paper outlines the recent work of the BSIM project at the University of California, Berkeley,including BSIM5 research, BSIM4 enhancements, and BSIMSOI development. BSIM5 addresses the needs of nano-CMOS technology and RF high-speed CMOS circuit simulation. BSIM4 is a mature industrial standard MOSFET model with several improvements to meet the technology requirements. BSIMSOI is developed into a generic model framework for PD and FD SOI technology. An operation mode choice,via the calculation of the body potential △Vbi and body current/charge,helps circuit designers in the trend of the coexistence of PD and FD devices.

关键词： compact modeling BSIM5 BSIM4 BSIMSOI device physics MOSFETs

Impacts of Parameter Scaling for Low-Power Applications Using CNTFET （Carbon Nanotube Field Effect Transistor） Models： A Comparative Assessment

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Journal of Energy and Power Engineering 2014年第6期8卷 1142-1152页

作者： Atheer Al-Shaggah Abdoul Rjoub Mohammed Khasawneh Electrical Engineering Department Jordan University of Science and Technology Irbid 22110 Jordan Computer Engineering Department Jordan University of Science and Technology Irbid 22110 Jordan

This paper provides an extension to the earlier work wherein a comparison between different models that had studied the effects of several parameters scaling on the performance of carbon nano tube field-effect transistors was presented. The evaluation for the studied models, with regard to the scaling effects, was to determine those which best reflect the very essence of carbon nano-tube technologies. Whereas the models subject this comparison （Fettoy, Roy, Stanford, and Southampton） were affected to varying degrees due to such parametric variations, the Stanford model was shown as still being valid for a wide range of chiralities and diameter sizes; a model that is also applicable for circuit simulations. In this paper, we present a comparative assessment of the various models subject to the study with regard to the effect of incorporating multiple carbon nanotubes in the channel region. We also assess the effect of oxide thickness on transistor performance in terms of the supply voltage threshold effects. Results leveraging our findings in this ongoing research endeavor reveal that many research efforts were not efficient to high degree due to high delay and not valid for circuit simulations.

关键词： Ballistic effects CNT (carbon nanotubes) CNFET (carbon nanotube field-effect transistor) energy-saving technologies,low-power applications compact modeling SPICE simulations.