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IDL compiler API Design, Application and Validation Based on XML API

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Wuhan University Journal of Natural Sciences 2008年第1期13卷 27-32页

作者： NIE Nan LU Yansheng ZHANG Suzhi XIE Xiaodong College of Computer Science and Technology Huazhong University of Science and Technology Wuhan 430074 Hubei China School of Computer and Communication Engineering Zhengzhou University of Light Industry Zhengzhou 450002 Henan China

In order to adapt different languages and platforms, the paper discusses how to process and validate IDL symbol table and intermediate code by XML API. It puts emphasis on IDL AP1 extension towards DOM API based on the idea of combining XML with IDL compilers. At last, the IDL compiler designing framework based on XML AP! is given, in which compiler front end can be managed and validated by some XML techniques and tools, IDL API can be validated on the basis of test, so IDL intermediate code is provided with maintainability, portability and generation. IDL compiler can be developed and extended by XML-based API, which realizes versatility and portability of modern compiler.

关键词： IDL compiler XML API UML

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Construction of compiler technology course in application-based university

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Construction of compiler technology course in application-ba...

Research on General-Purpose Brain-Inspired Computing Systems

2013教育技术与信息系统国际会议

作者： Wang Na Zhang ShiMing School of Computer and information Shanghai Second Polytechnic University

compiler technology course is a very important compulsory basic course in professional computer education, and it is also an important branch in the computer system software. But the value of compiler’s existence as a classic core curriculum of computer science is to be questioned especially in some application university. Instead, they focus on the practice ability of mastering several languages and developing application systems. In our paper, we propose a new construction of compiler technology course which combine theory and practice and divide compiler into two levels: compiler technology and compiler theory.

关键词： compiler construction Application University practice theory

来源： cnki会议评论

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Journal of Computer Science & Technology 2024年第1期39卷 4-21页

作者：渠鹏纪兴龙陈嘉杰庞猛李宇晨刘晓义张悠慧 Department of Computer Science and Technology Tsinghua UniversityBeijing 100084China Department of Precision Instrument Tsinghua UniversityBeijing 100084China

Brain-inspired computing is a new technology that draws on the principles of brain science and is oriented to the efficient development of artificial general intelligence(AGI),and a brain-inspired computing system is a hierarchical system composed of neuromorphic chips,basic software and hardware,and algorithms/applications that embody this *** the system is developing rapidly,it faces various challenges and opportunities brought by interdisciplinary research,including the issue of software and hardware *** paper analyzes the status quo of brain-inspired computing *** by some design principle and methodology of general-purpose computers,it is proposed to construct"general-purpose"brain-inspired computing systems.A general-purpose brain-inspired computing system refers to a brain-inspired computing hierarchy constructed based on the design philosophy of decoupling software and hardware,which can flexibly support various brain-inspired computing applications and neuromorphic chips with different ***,this paper introduces our recent work in these aspects,including the ANN(artificial neural network)/SNN(spiking neural network)development tools,the hardware agnostic compilation infrastructure,and the chip micro-archi-tecture with high flexibility of programming and high performance;these studies show that the"general-purpose"system can remarkably improve the efficiency of application development and enhance the productivity of basic software,thereby being conductive to accelerating the advancement of various brain-inspired algorithms and *** believe that this is the key to the collaborative research and development,and the evolution of applications,basic software and chips in this field,and conducive to building a favorable software/hardware ecosystem of brain-inspired computing.

关键词： brain-inspired computing neuromorphic chip compiler spiking neural network

瑞萨科技选用Synopsys IC compiler作为SoC设计流程解决方案

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半导体信息 2007年第3期 17-18页

作者：希雷

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威捷半导体采用Synopsys IC compiler进行90纳米设计

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半导体信息 2007年第1期 17-17页

作者：程文芳

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Algorithms for Pre-Compiling Programs by Parallel compilers

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Computer Systems Science & Engineering 2023年第3期44卷 2165-2176页

作者： Fayez AlFayez Department of Computer Science and Information College of ScienceMajmaah UniversityAl-Majmaah11952Saudi Arabia

The paper addresses the challenge of transmitting a big number offiles stored in a data center(DC),encrypting them by compilers,and sending them through a network at an acceptable *** to the big number offiles,only one compiler may not be sufficient to encrypt data in an acceptable *** this paper,we consider the problem of several compilers and the objective is tofind an algorithm that can give an efficient schedule for the givenfiles to be compiled by the *** main objective of the work is to minimize the gap in the total size of assignedfiles between *** minimization ensures the fair distribution offiles to different *** problem is considered to be a very hard *** paper presents two research *** axis is related to *** propose a novel pre-compiler architecture in this *** second axis is algorithmic *** develop six algorithms to solve the problem,in this *** algorithms are based on the dispatching rules method,decomposition method,and an iterative *** algorithms give approximate solutions for the studied *** experimental result is imple-mented to show the performance of *** indicators are used to measure the performance of the proposed *** addition,five classes are proposed to test the algorithms with a total of 2350 instances.A comparison between the proposed algorithms is presented in different tables discussed to show the performance of each *** result showed that the best algorithm is the Iterative-mixed Smallest-Longest-Heuristic(ISL)with a percentage equal to 97.7%and an average running time equal to 0.148 *** other algorithms did not exceed 22%as a *** best algorithm excluding ISL is Iterative-mixed Longest-Smallest Heuristic(ILS)with a percentage equal to 21,4%and an average running time equal to 0.150 s.

关键词： compiler encryption scheduling big data algorithms

Automatic Target Description File Generation

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Journal of Computer Science & Technology 2023年第6期38卷 1339-1355页

作者：耿洪娜吕方钟茗崔慧敏薛景玲冯晓兵 State Key Laboratory of Processors Institute of Computing TechnologyChinese Academy of SciencesBeijing 100190China University of Chinese Academy of Sciences Beijing 100049China School of Computer Science and Engineering University of New South WalesSydneyNSW 2052Australia

Agile hardware design is gaining increasing momentum and bringing new chips in larger quantities to the market ***,it also takes new challenges for compiler developers to retarget existing compilers to these new chips in shorter time than ever ***,retargeting a compiler backend,e.g.,an LLVM backend to a new target,requires compiler developers to write manually a set of target description files(totalling 10300+lines of code(LOC)for RISC-V in LLVM),which is error-prone and *** this paper,we introduce a new approach,Au-tomatic Target Description File Generation(ATG),which accelerates the generation of a compiler backend for a new tar-get by generating its target description files *** a new target,ATG proceeds in two ***,ATG synthesizes a small list of target-specific properties and a list of code-layout templates from the target description files of a set of existing targets with similar instruction set architectures(ISAs).Second,ATG requests compiler developers to fill in the information for each instruction in the new target in tabular form according to the list of target-specific properties syn-thesized and then generates its target description files automatically according to the list of code-layout templates *** first stage can often be reused by different new targets sharing similar *** evaluate ATG using nine RISC-V instruction sets drawn from a total of 1029 instructions in LLVM *** enables compiler developers to gen-erate compiler backends for these ISAs that emit the same assembly code as the existing compiler backends for RISC-V but with significantly less development effort(by specifying each instruction in terms of up to 61 target-specific properties only).

关键词： retargetability compiler target description target backend automatic generator

Architecture-circuit-technology co-optimization for resistive random access memory-based computation-in-memory chips

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Science China(Information Sciences) 2023年第10期66卷 152-161页

作者： Yuyi LIU Bin GAO Jianshi TANG Huaqiang WU He QIAN School of Integrated Circuits Beijing National Research Center for Information Science and Technology(BNRist) Tsinghua University

Computation-in-memory(CIM) chips offer an energy-efficient approach to artificial intelligence computing workloads. Resistive random-access memory(RRAM)-based CIM chips have proven to be a promising solution for overcoming the von Neumann bottleneck. In this paper, we review our recent studies on the architecture-circuit-technology co-optimization of scalable CIM chips and related hardware demonstrations. To further minimize data movements between memory and computing units, architecture optimization methods have been introduced. Then, we propose a device-architecture-algorithm co-design simulator to provide guidelines for designing CIM systems. A physics-based compact RRAM model and an array-level analog computing model were embedded in the simulator. In addition, a CIM compiler was proposed to optimize the on-chip dataflow. Finally, research perspectives are proposed for future development.

关键词： resistive random-access memory computation-in-memory compact model device-architecture-algorithm co-design compiler

Yet Another Intelligent Code-Generating System： A Flexible and Low-Cost Solution

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Journal of Computer Science & Technology 2018年第5期33卷 940-965页

作者： Joao Fabricio Filho Luis Gustavo Araujo Rodriguez Anderson Faustino da Silva Department of Informatics State University of Maringd Maringd-PR 87020-900 Brazil Federal University of Technology -- Parand Campo Mourao-PR 87301-899 Brazil

Modern compilers apply various code transformation algorithms to improve the quality of the target code. However, a complex problem is to determine which transformation algorithms must be utilized. This is difficult because of three reasons： a number of transformation algorithms, various combination possibilities, and several configuration possibil- ities. Over the last few years, various intelligent systems were presented in the literature. The goal of these systems is to search for transformation algorithms and thus apply them to a certain program. This paper proposes a flexible, low-cost and intelligent system capable of identifying transformation algorithms for an input program, considering the program＇s specific features. This system is flexible for parameterization selection and has a low-computational cost. In addition, it has the capability to maximize the exploration of available computational resources. The system was implemented under the Low Level Virtual Machine infrastructure and the results indicate that it is capable of exceeding, up to 21.36%, performance reached by other systems. In addition, it achieved an average improvement of up to 17.72% over the most aggressive compiler optimization level of the Low Level Virtual Machine infrastructure.

关键词： compiler code transformation iterative compilation knowledge representation machine learning