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Effects of the VGS sweep range on the short channel effect in negative capacitance FinFETs

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Science China(Information Sciences) 2024年第6期 463-464页

作者： Fan ZHANG Zhaohao ZHANG Jiaxin YAO Qingzhu ZHANG Gaobo XU Zhenhua WU Huan LIU Genquan HAN Yan LIU huaxiang yin Integrated Circuit Advanced Process R&D Center State Key Lab of Fabrication Technologies for Integrated CircuitsInstitute of Microelectronics of Chinese Academy of Sciences School of Microelectronics Xidian University School of Integrated Circuits University of Chinese Academy of Sciences

As the CMOS technology scaling is reaching fundamental limits,there is a substantial demand for energy-efficient devices with lower operating *** capacitance field-effect transistors （NCFETs） exhibit the capability to amplify the gate voltage and become promising candidates for future advanced process *** （FE） HfO2-based materials,

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基于硅材料MOS量子点单自旋量子比特的研究与实现

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稀有金属 2024年第1期48卷 118-137页

作者：顾杰殷华湘吴振华张青竹中国科学院微电子研究所集成电路先导工艺研发中心北京100029 中国科学院微电子研究所微电子器件与集成技术重点实验室北京100088 中国科学院大学北京100029 中国有研科技集团有限公司智能传感功能材料国家重点实验室北京100049

量子计算作为未来计算技术发展的一个重要方向,在一些特定领域具有现代计算机无可比拟的强大优势。基于硅材料的金属氧化物半导体(metal-oxide-semiconductor,MOS)量子点自旋量子比特由于拥有较长的相干时间以及与现代集成电路工艺兼容... 详细信息

量子计算作为未来计算技术发展的一个重要方向,在一些特定领域具有现代计算机无可比拟的强大优势。基于硅材料的金属氧化物半导体(metal-oxide-semiconductor,MOS)量子点自旋量子比特由于拥有较长的相干时间以及与现代集成电路工艺兼容等优势,在近些年来获得了广泛研究,并取得了较大发展,成为了实现通用量子计算重要的候选方案之一。总结了硅MOS量子点单自旋量子比特实现方案,介绍了硅量子点量子计算的研究背景及意义,叙述目前硅MOS量子点单自旋量子比的研究进展,介绍了MOS量子点器件结构、量子点电荷输运理论、量子比特的读出、量子比特的操作、退相干的影响因素与抑制方法以及扩展与集成等方面的内容,最后讨论了硅MOS量子点自旋量子比特在实现通用量子计算方面面临的挑战与未来发展趋势。

关键词：硅量子点量子比特量子计算自旋

Investigation of time domain characteristics of negative capacitance FinFET by pulse-train approaches

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Journal of Semiconductors 2021年第11期42卷 79-84页

作者： Yuwei Cai Zhaohao Zhang Qingzhu Zhang Jinjuan Xiang Gaobo Xu Zhenhua Wu Jie Gu huaxiang yin Key Laboratory of Microelectronics Devices&Integrated Technology Institute of MicroelectronicsChinese Academy of SciencesBeijing 100029China University of Chinese Academy of Sciences Beijing 100049China

The HfO2-based ferroelectric field effect transistors(FeFET)have been widely studied for their ability in breaking the Boltzmann limit and the potential to be applied to low-power *** article systematically investigates the transient response of negative capacitance(NC)fin field-effect transistors(FinFETs)through two kinds of self-built test *** comparing the results with those of conventional FinFETs,we experimentally demonstrate that the on-current of the NC FinFET is not degraded in the MHz frequency *** test results in the higher frequency domain show that the on-state current of the prepared NC FinFET increases with the decreasing gate pulse width at pulse widths below 100 ns and is consistently greater(about 80%with NC NMOS)than the on-state current of the conventional transistor,indicating the great potential of the NC FET for future high-frequency applications.

关键词： transient response pulse train NC FET measurement charge trapping

Recent progress of hafnium oxide-based ferroelectric devices for advanced circuit applications

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Science China(Information Sciences) 2023年第10期66卷 84-104页

作者： Zhaohao ZHANG Guoliang TIAN Jiali HUO Fang ZHANG Qingzhu ZHANG Gaobo XU Zhenhua WU Yan CHENG Yan LIU huaxiang yin Integrated Circuit Advanced R&D Center Institute of Microelectronics of Chinese Academy of Sciences School of Integrated Circuits University of Chinese Academy of Sciences School of Microelectronics Xidian University Department of Electronics East China Normal University

Hafnium oxide-based ferroelectric field-effect-transistors(FeFET), which combine super-steep logical switching and low power non-volatile memory functions, have significant potential for post-Moore integrated circuit innovations with higher energy efficiency and larger integration scale. In this review, recent research into hafnium oxide-based ferroelectric(FE) films and different functional devices is presented,from fundamentals to applications. Different technological challenges and state-of-the-art research and development efforts related to the physical understanding and performance optimization of FE films, advanced hafnium oxide-based device integration, and device applications in logic-in-memory and artificial synapses and neurons for neuromorphic computing are addressed.

关键词： ferroelectric FeFET hafnium oxide HZO logic-in-memory neuromorphic computing

Single-event-transient effects in silicon-on-insulator ferroelectric double-gate vertical tunneling field effect transistors

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Science China(Information Sciences) 2020年第12期63卷 278-280页

作者： Guoliang TIAN Jinshun BI Gaobo XU Kai XI Xueqin YANG Majumdar SANDIP huaxiang yin Qiuxia XU Wenwu WANG Institute of Microelectronics Chinese Academy of Sciences School of Microelectronics University of Chinese Academy of Sciences Department of Physics ICFAI School of Science ICFAI University Tripura

Dear editor,Ferroelectric tunneling FETs (FeTFETs) are the increasingly significant research topics on novel low-power electronic devices [1, 2], because ferroelectric materials’ negative capacitance effect is helpfu... 详细信息

关键词： SOI double-gate FeTFET single-event-transient heavy ion numerical simulation vertical tunneling

Structure Design Considerations of a Sub-50nm Self-Aligned Double-Gate MOSFET

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Journal of Semiconductors 2002年第12期23卷 1267-1274页

作者：殷华湘徐秋霞中国科学院微电子中心北京100029

A comprehensive way to design a sub 50nm SADG MOSFET with the ability of being fabricated by improved CMOS technique is *** this way,the gate length and thickness of Si island of DG device show many different scaling limits for various ***,the spacer insulator shows a kind of width thickness on device drain current and circuit speed.A model about that effect is developed and offers design consideration for future.A new design of channel doping profile,called SCD,is also discussed here in *** DG device with SCD can achieve a good balance between the volume inversion operation mode and the control of V th .Finally,a guideline to make a SADG MOSFET is presented.

关键词： double gate MOSFET structure design sidewall effect SCD

CMOS FinFET Fabricated on Bulk Silicon Substrate

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Journal of Semiconductors 2003年第4期24卷 351-356页

作者：殷华湘徐秋霞中国科学院微电子中心北京100029

A CMOS FinFET fabricated on bulk silicon substrate is *** owning a FinFET structure similar to the original FinFET on SOI,the device combines a grooved planar MOSFET in the Si substrate and the fabrication processes are fully compatible with conventional CMOS process,including salicide *** CMOS device,inverter,and CMOS ring oscillator of this structure with normal poly silicon and W/TiN gate electrode are fabricated *** current and sub threshold characteristics of CMOS FinFET on Si substrate with actual gate length of 110nm are *** inverter operates correctly and minimum per stage delay of 201 stage ring oscillator is 146ps at V d=*** result indicates the device is a promising candidate for the application of future VLSI circuit.

关键词： FinFET groove design fabrication device characteristics CMOS bulk Si substrate

Improved performance of MoS_(2)FET by in situ NH_(3)doping in ALD Al_(2)O_(3)dielectric

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Chinese Physics B 2022年第7期31卷 560-564页

作者： Xiaoting Sun Yadong Zhang Kunpeng Jia Guoliang Tian Jiahan Yu Jinjuan Xiang Ruixia Yang Zhenhua Wu huaxiang yin School of Information Engineering Hebei University of TechnologyTianjin 300401China Key Laboratory of Microelectronics Device and Integrated Technology Institute of Microelectronics Chinese Academy of SciencesBeijing 100029China University of Chinese Academy of Sciences Beijing 100049China

Since defects such as traps and oxygen vacancies exist in dielectrics,it is difficult to fabricate a high-performance MoS_(2)field-effect transistor(FET)using atomic layer deposition(ALD)Al_(2)O_(3)as the gate dielectric *** this paper,NH_(3)in situ doping,a process treatment approach during ALD growth of Al_(2)O_(3),is used to decrease these defects for better device ***_(2)FET has been well fabricated with this technique and the effect of different NH_(3)in situ doping sequences in the growth cycle has been investigated in *** with counterparts,those devices with NH_(3)in situ doping demonstrate obvious performance enhancements:Ion/Ioff is improved by one order of magnitude,from 1.33×10^(5)to 3.56×10^(6),the threshold voltage shifts from-0.74 V to-0.12 V and a small subthreshold swing of 105 m V/dec is *** improved MoS_(2)FET performance is attributed to nitrogen doping by the introduction of NH_(3)during the Al_(2)O_(3)ALD growth process,which leads to a reduction in the surface roughness of the dielectric layer and the repair of oxygen vacancies in the Al_(2)O_(3)***,the MoS_(2)FET processed by in situ NH_(3)doping after the Al and O precursor filling cycles demonstrates the best performance;this may be because the final NH_(3)doping after film growth restores more oxygen vacancies to screen more charge scattering in the MoS_(2)*** reported method provides a promising way to reduce charge scattering in carrier transport for high-performance MoS_(2)devices.

关键词： MoS_(2) Al_(2)O_(3)dielectric NH_(3)in-situ doping oxygen vacancy

Influence of an ALD TiN capping layer on the PBTI characteristics of n-FinFET with ALD HfO2/TiN-capping/TiAl gate stacks

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Science China(Information Sciences) 2020年第2期63卷 248-250页

作者： Hong YANG Luwei QI Yanbo ZHANG Bo TANG Qianqian LIU Hao XU Xueli MA Xiaolei WANG Yongliang LI huaxiang yin Junfeng LI Huilong ZHU Chao ZHAO Wenwu WANG Tianchun YE Key Laboratory of Microelectronics Devices & Integrated Technology Institute of MicroelectronicsChinese Academy of Sciences National Space Science Center Chinese Academy of Sciences School of Microelectronics University of Chinese Academy of Sciences

Dear editor,High k/metal gate (HKMG) stacks with fully gatelast processing have become the primary solution for sub-22-nm volume manufacturing with the development of complementary oxide semiconductor(CMOS) technology [1]. In the HKMG stack, titanium nitride (TiN) is observed to play an important role as a work-function metal and an HK

关键词： red Influence of an ALD TiN capping layer on the PBTI characteristics of n-FinFET with ALD HfO2/TiN-capping/TiAl gate stacks ALD FinFET