Advanced Spice Modeling for 65nm CMOS Technology
作者单位：ProPlus Design SolutionsInc. Semiconductor Manufacturing International Corporation
会议名称：《2008 9th International Conference on Solid-State and Integrated-Circuit Technology》
会议日期：2008年
学科分类：080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 080501[工学-材料物理与化学] 0805[工学-材料科学与工程（可授工学、理学学位）] 080502[工学-材料学]
关 键 词：[IEEE Keyword]Mathematical model Semiconductor device modeling Data mining Human computer interaction Stress Integrated circuit modeling Degradation
摘 要：正The paper presents a comprehensive study of Spice modeling for some key physical effects observed in a 65nm ***-induced stress effect,well proximity effect,as well as HCI and NBTI reliability effects,which can not be neglected for technologies beyond 90nm and must be properly modeled for accurate circuit simulations,are discussed in this study.