Numerical and analytical investigations for the SOI LDMOS with alternated high-k dielectric and step doped silicon pillars
Numerical and analytical investigations for the SOI LDMOS with alternated high-k dielectric and step doped silicon pillars作者机构:College of Electronic and Optical Engineering&College of MicroelectronicsNanjing University of Posts and TelecommunicationsNanjing 210023China National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly TechnologyNanjing 210023China School of Electrical EngineeringUniversity of VermontBurlingtonVT 05405USA
出 版 物:《Chinese Physics B》 (中国物理B(英文版))
年 卷 期:2020年第29卷第3期
页 面:460-467页
核心收录:
学科分类:080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术(可授工学、理学学位)] 08[工学] 080501[工学-材料物理与化学] 0805[工学-材料科学与工程(可授工学、理学学位)] 080502[工学-材料学]
主 题:high-k dielectric step doped silicon pillar model breakdown voltage
摘 要:This paper presents a new silicon-on-insulator(SOI) lateral-double-diffused metal-oxide-semiconductor transistor(LDMOST) device with alternated high-k dielectric and step doped silicon pillars(HKSD device). Due to the modulation of step doping technology and high-k dielectric on the electric field and doped profile of each zone, the HKSD device shows a greater performance. The analytical models of the potential, electric field, optimal breakdown voltage, and optimal doped profile are derived. The analytical results and the simulated results are basically consistent, which confirms the proposed model suitable for the HKSD device. The potential and electric field modulation mechanism are investigated based on the simulation and analytical models. Furthermore, the influence of the parameters on the breakdown voltage(BV) and specific on-resistance(R_(on,sp)) are obtained. The results indicate that the HKSD device has a higher BV and lower R_(on,sp) compared to the SD device and HK device.