Modeling of a triple reduced surface field silicon-on-insulator lateral double-diffused metal–oxide–semiconductor field-effect transistor with low on-state resistance

作     者：王裕如 刘祎鹤 林兆江 方冬 李成州 乔明 张波 

作者机构：State Key Laboratory of Electronic Thin Films and Integrated DevicesUniversity of Electronic Science and Technology of China (UESTC) Institute of Electronic and Information Engineering in Dongguan UESTC 

出 版 物：《Chinese Physics B》 (中国物理B（英文版）)

年 卷 期：2016年第25卷第2期

页      面：430-435页

核心收录：

学科分类：080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 080501[工学-材料物理与化学] 0805[工学-材料科学与工程（可授工学、理学学位）] 080502[工学-材料学] 0704[理学-天文学] 081201[工学-计算机系统结构] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

基　　金：Project supported by the National Natural Science Foundation of China(Grant No.61376080) the Natural Science Foundation of Guangdong Province,China(Grant No.2014A030313736) the Fundamental Research Funds for the Central Universities,China(Grant No.ZYGX2013J030) 

主　　题：analytical model triple reduced surface field (RESURF) silicon-on-insulator (SOI) n-type top (N-top) layer 

摘      要：An analytical model for a novel triple reduced surface field（RESURF） silicon-on-insulator（SOI） lateral doublediffused metal–oxide–semiconductor（LDMOS） field effect transistor with n-type top（N-top） layer, which can obtain a low on-state resistance, is proposed in this paper. The analytical model for surface potential and electric field distributions of the novel triple RESURF SOI LDMOS is presented by solving the two-dimensional（2D） Poisson＇s equation, which can also be applied to single, double and conventional triple RESURF SOI structures. The breakdown voltage（BV） is formulized to quantify the breakdown characteristic. Besides, the optimal integrated charge of N-top layer（Q_（ntop）） is derived, which can give guidance for doping the N-top layer. All the analytical results are well verified by numerical simulation results,showing the validity of the presented model. Hence, the proposed model can be a good tool for the device designers to provide accurate first-order design schemes and physical insights into the high voltage triple RESURF SOI device with N-top layer.