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CMOS high linearity PA driver with an on-chip transformer for W-CDMA application

CMOS high linearity PA driver with an on-chip transformer for W-CDMA application

作     者:付健 梅年松 黄煜梅 洪志良 

作者机构:ASIC & System State Key LaboratoryFudan University 

出 版 物:《Journal of Semiconductors》 (半导体学报(英文版))

年 卷 期:2011年第32卷第9期

页      面:106-111页

核心收录:

学科分类:080903[工学-微电子学与固体电子学] 0808[工学-电气工程] 0809[工学-电子科学与技术(可授工学、理学学位)] 08[工学] 080501[工学-材料物理与化学] 0805[工学-材料科学与工程(可授工学、理学学位)] 080502[工学-材料学] 0703[理学-化学] 0702[理学-物理学] 

基  金:Project supported by the National High Technology Research and Development Program of China(No.2009AA011605) 

主  题:CMOS PA driver on-chip transformer impedance transformation linearity efficiency 

摘      要:A fully integrated high linearity differential power amplifier driver with an on-chip transformer in a standard 0.13-μm CMOS process for W-CDMA application is *** transformer not only accomplishes output impedance matching,but also acts as a balun for converting differential signals to single-ended *** a supply voltage of 3.3 V,the measured maximum power is larger than 17 dBm with a peak power efficiency of 21%.The output power at the 1-dB compression point and the power gain are 12.7 dBm and 13.2 dB,respectively. The die size is 0.91×1.12 mm;.

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