Development of Ultra-High Density Silicon Nanowire Arrays for Electronics Applications

作     者：Dunwei Wang Bonnie A.Sheriff Michael McAlpine James R.Heath 

作者机构：Department of ChemistryBoston College140 Commonwealth AveChestnut HillMA 02467USA Division of Chemistry and Chemical Engineering and the Kavli Nanoscience CenterCaltech127-72PasadenaCA 91125USA 

出 版 物：《Nano Research》 (纳米研究（英文版）)

年 卷 期：2008年第1卷第1期

页      面：9-21页

核心收录：

学科分类：080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 080501[工学-材料物理与化学] 0805[工学-材料科学与工程（可授工学、理学学位）] 080502[工学-材料学] 

基　　金：supported by a subcontract from the MITRE Corporation the MARCO center for Advanced Materials and Devices and the National Science Foundation(NMF-CCF-05204490 and CCF-0541461) 

主　　题：Ultra-high density nanowire superlattice nanowire pattern transfer logic circuit 

摘      要：This article reviews our recent progress on ultra-high density nanowires(NWs)array-based *** superlattice nanowire pattern transfer(SNAP)method is utilized to produce aligned,ultra-high density Si NW *** fi rst cover processing and materials issues related to achieving bulk-like conductivity characteristics from 1020 nm wide Si *** then discuss Si NW-based fi eld-effect transistors(FETs).These NWs&NW FETs provide terrifi c building blocks for various electronic circuits with applications to memory,energy conversion,fundamental physics,logic,and *** focus our discussion on complementary symmetry NW logic circuitry,since that provides the most demanding metrics for guiding *** such as controlling the density and spatial distribution of both p-and n-type dopants within NW arrays are discussed,as are general methods for achieving Ohmic contacts to both p-and n-type *** various materials and nanofabrication advances are brought together to demonstrate energy effi cient,complementary symmetry NW logic circuits.