Noise and linearity optimization methods for a 1.9GHz low noise amplifier

作     者：郭为 黄达诠 

作者机构：DepartmentofInformationandElectronicEngineeringZhejiangUniversityHangzhou310027China 

出 版 物：《Journal of Zhejiang University Science》 (浙江大学学报（自然科学英文版）)

年 卷 期：2003年第4卷第3期

页      面：281-286页

核心收录：

学科分类：080903[工学-微电子学与固体电子学] 080902[工学-电路与系统] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 

主　　题：RFIC CMOS LNA NF noise IP3 linearity 

摘      要：Noise and linearity performances are critical characteristics for radio frequency integrated circuits (RFICs), especially for low noise amplifiers (LNAs). In this paper, a detailed analysis of noise and linearity for the cascode architecture, a widely used circuit structure in LNA designs, is presented. The noise and the linearity improvement techniques for cascode structures are also developed and have been proven by computer simulating experiments. Theoretical analysis and simulation results showed that, for cascode structure LNAs, the first metallic oxide semiconductor field effect transistor (MOSFET) dominates the noise performance of the LNA, while the second MOSFET contributes more to the linearity. A conclusion is thus obtained that the first and second MOSFET of the LNA can be designed to optimize the noise performance and the linearity performance separately, without trade offs. The 1.9GHz Complementary Metal Oxide Semiconductor (CMOS) LNA simulation results are also given as an application of the developed theory.