A low-voltage and energy-efficient full adder cell based on carbon nanotube technology

作     者：Keivan Navi Rabe'e Sharifi Rad Mohammad Hossein Moaiyeri Amir Momeni 

作者机构：Faculty of Electrical and Computer Engineering Shahid Beheshti UniversityGC 

出 版 物：《Nano-Micro Letters》 (纳微快报（英文版）)

年 卷 期：2010年第2卷第2期

页      面：114-120页

核心收录：

学科分类：080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术（可授工学、理学学位）] 07[理学] 070205[理学-凝聚态物理] 08[工学] 080501[工学-材料物理与化学] 0805[工学-材料科学与工程（可授工学、理学学位）] 080502[工学-材料学] 0702[理学-物理学] 

主　　题：CNFET Low-Voltage Full-Adder Minority-Function Nanotechnology 

摘      要：Scaling problems and limitations of conventional silicon transistors have led the designers to exploit novel nano-technologies. One of the most promising and feasible nano-technologies is CNT(Carbon Nanotube) based transistors. In this paper, a high-speed and energy-efficient CNFET(Carbon Nanotube Field Effect Transistor) based Full Adder cell is proposed for nanotechnology. This design is simulated in various supply voltages, frequencies and load capacitors using HSPICE circuit simulator. Significant improvement is achieved in terms of speed and PDP(Power-Delay-Product) in comparison with other classical and state-of-the-art CMOS and CNFET-based designs, existing in the literature. The proposed Full Adder can also drive large load capacitance and works properly in low supply voltages.