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Effects of interface trap density on the electrical performance of amorphous InSnZnO thin-film transistor

Effects of interface trap density on the electrical performance of amorphous InSnZnO thin-film transistor

作     者:梁永烨 Kyungsoo Jang S.Velumani Cam Phu Thi Nguyen Junsin Yi 

作者机构:National Key Laboratory for Electronic Measurement Technology North University of China College of Information and Communication Engineering Sungkyunkwan University Department of Electrical Engineering (SEES) CINVESTAV-IPN Avenida IPN 6508San Pedro Zacatenco Mexico D.F. 

出 版 物:《Journal of Semiconductors》 (半导体学报(英文版))

年 卷 期:2015年第36卷第2期

页      面:82-86页

核心收录:

学科分类:080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术(可授工学、理学学位)] 08[工学] 080501[工学-材料物理与化学] 0805[工学-材料科学与工程(可授工学、理学学位)] 080502[工学-材料学] 

主  题:a-ITZO TFTs low resistivity interface trap density electrical properties electrical stability 

摘      要:We reported the influence of interface trap density(Nt) on the electrical properties of amorphous InSnZnO based thin-film transistors,which were fabricated at different direct-current(DC) magnetron sputtering *** device with the smallest Nt of 5.68×10^11 cm^-2 and low resistivity of 1.21×10^-3Ω·cm exhibited a turn-on voltage(V(ON)) of-3.60 V,a sub-threshold swing(S.S) of 0.16 V/dec and an on-off ratio(I(ON)/I(OFF)) of^8 x 10^*** increasing Nt,the V(ON),S.S and I(ON)/I(OFF) were suppressed to-9.40 V,0.24 V/dec and 2.59×10^8,*** V(TH) shift under negative gate bias stress has also been estimated to investigate the electrical stability of the *** result showed that the reduction in Nt contributes to an improvement in the electrical properties and stability.

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