Formation of Co-implanted Silicon Ultra-Shallow Junctions for Low Thermal Budget Applications

作     者：Rehana Mustafa S.Ahmed E.U.Khan 

作者机构：Department of PhysicsInternational Islamic UniversityIslamabadPakistan Advanced Electronics LaboratoryFaculty of Engineering&TechnologyInternational Islamic University IslamabadPakistan Center for Emerging SciencesEngineering and TechnologyIslamabadPakistan Department of PhysicsGomal UniversityD.I.KhanPakistan 

出 版 物：《Chinese Physics Letters》 (中国物理快报（英文版）)

年 卷 期：2013年第30卷第1期

页      面：127-129页

核心收录：

学科分类：08[工学] 0805[工学-材料科学与工程（可授工学、理学学位）] 080502[工学-材料学] 0704[理学-天文学] 

基　　金：HEC HEC under the NRPU scheme 

主　　题：shallow annealing implantation 

摘      要：We present a systematic study to create ultra-shallow junctions in n-type silicon substrates and investigate both pre-and post-annealing processes to create a processing strategy for potential applications in *** wafers were co-implanted with indium and C atoms at energies of 70 keV and 10 keV,respectively.A carefully chosen implantation schedule provides an abrupt ultra-shallow junction between 17 and 43 nm with suppressed sheet resistance and appropriate retained sheet carrier concentration at low thermal budget.A defect doping matrix,primarily the behavior and movement of co-implant generated interstitials at different annealing temperatures,may be engineered to form sufficiently activated ultra-shallow devices.