Numerical Analysis of Gate-to-Source Distance Effects in SiC MESFETs
Numerical Analysis of Gate-to-Source Distance Effects in SiC MESFETs作者机构:State key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of China (UESTC) Chengdu 610054 China
出 版 物:《Journal of Electronic Science and Technology of China》 (中国电子科技(英文版))
年 卷 期:2007年第5卷第4期
页 面:340-343页
学科分类:080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术(可授工学、理学学位)] 08[工学] 080501[工学-材料物理与化学] 0805[工学-材料科学与工程(可授工学、理学学位)] 080502[工学-材料学]
基 金:This work was supported by the Major State Basic Research Development Program of China under Contract 51327010101
主 题:Gate-to-source scaling saturation drain current SiC MESFETs small-signal analysis.
摘 要:Two-dimensional DC and small-signal analysis of gate-to-source scaling effects in SiC-based high-power field-effect transistors have been performed in this paper. The simulation results show that a downscaling of gate-to-source distance can improve device performance, i.e. enhancing drain current, transconductance, and maximum oscillation frequency. This is associated with the peculiar dynamic of electrons in SiC MESFETs, which lead to a linear velocity regime in the source access region. The variations of gate-to-source capacitance, gate-to-drain capacitance, and cut-off frequency with respect to the change in gate-to-source length have also been studied in detail.