VLSI and SPICE modeling of ALU

作     者：Saeid Mos lehpour Srikrishna Karatalapu 

作者机构：Department of Electrical and Computer Engineering University of Hartford West Hartford CT 06117 USA 

出 版 物：《通讯和计算机（中英文版）》 (Journal of Communication and Computer)

年 卷 期：2009年第6卷第10期

页      面：44-53页

学科分类：080903[工学-微电子学与固体电子学] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 081201[工学-计算机系统结构] 0812[工学-计算机科学与技术（可授工学、理学学位）] 

主　　题：SPICE 超大规模集成电路 ALU 建模 互补金属氧化物半导体 PSpice 逻辑单元 仿真软件 

摘      要：The Arithmetic and Logic Unit (ALU) is a combination circuit that performs a number of arithmetic and logical operations within a microprocessor. The demand for faster and compact ALUs makes it desirable to test the ALU in conjunction with pre-design parts prior to manufacture. This may be accomplished in a process using CAD and SPICE simulation software. Our purpose is to realize a method for importing a layout drawn in Tanner L-edit and simulated in T-Spice into PSpice which is referred to as software talking. To do so we use an eight-function instruction set called Complimentary Metal Oxide Semiconductor Arithmetic and Logic Unit (CMOS ALU) which is laid out in Tanner L-edit and produces an extracted net-list which is simulated in T-Spice. An ALU equivalent design is then modeled in PSpice for further testing with pre-manufactured parts of the PSpice library.