A Survey: FPGA-Based Dynamic Scheduling of Hardware Tasks
A Survey: FPGA-Based Dynamic Scheduling of Hardware Tasks作者机构：PLA Strategic Support Force Information Engineering University National Digital Switching System Engineering and Technological R&D Center Southeast University
出 版 物：《Chinese Journal of Electronics》 (电子学报(英文))
年 卷 期：2021年第30卷第6期
页 面：991-1007页
核心收录：
学科分类：080902[工学-电路与系统] 0809[工学-电子科学与技术（可授工学、理学学位）] 08[工学] 0701[理学-数学] 0812[工学-计算机科学与技术（可授工学、理学学位）]
基 金：supported by the National Natural Science Foundation of China (No.61521003)
主 题：Logic circuits Optimisation techniques Logic and switching circuits Optimisation techniques Field programmable gate array Task scheduling Optimization Resource management Dynamic reconfiguration
摘 要：To meet the increasing computing needs of various application fields, Field programmable gate array(FPGA) has been widely deployed. In FPGA-based processing, hardware tasks can be better accelerated by allocating appropriate computing resources. Therefore,FPGA-based hardware task scheduling has become one of the mainstream research directions in academia and industry. However, the optimization objectives of existing FPGA-based hardware task scheduling methods are relatively scattered. In this regard, this paper summarizes the research status of hardware task dynamic scheduling from the three essential elements of FPGA processing: time, resources, and power *** paper analyzes, sorts out, categorizes the ideas and implementations of various scheduling methods and analyzes and evaluates optimization effects of various scheduling methods from multiple dimensions. Then, the shortcomings of the existing methods are summarized and some practical applications are introduced. Finally, the research direction of task scheduling based on FPGA is prospected and summarized.
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