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BENCHIP： Benchmarking Intelligence Processors

Journal of Computer Science & Technology 2018年第1期33卷 1-23页

作者： Jin-Hua Tao Zi-Dong Du Qi Guo Hui-Ying Lan Lei Zhang Sheng-Yuan Zhou Ling-Jie Xu Cong Liu Hai-Feng Liu Shah Tang Allen Rush Willian Chen Shao-Li Liu Yun-Ji Chen Tian-Shi Chen State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China School of Computer and Control Engineering University of Chinese Academy of Sciences Beijing 100049 China Intelligent Processor Research Center Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China cambricon ltd. Beijing 100190 China A libaba Infrastructure Service A libaba Group Hangzhou 311121 China Iflytek Co. Ltd. Hefei 230088 China Beijing Jingdong Century Trading Co. Ltd. Beijing 100176 China RDA Microdectronics Inc. Shanghai 201203 China Advanced Micro Devices Inc. Sunnyvale CA 94085 U.S.A.

The increasing attention on deep learning has tremendously spurred the design of intelligence processing hardware. The variety of emerging intelligence processors requires standard benchmarks for fair comparison and system optimization （in both software and hardware）. However, existing benchmarks are unsuitable for benchmarking intelligence processors due to their non-diversity and nonrepresentativeness. Also, the lack of a standard benchmarking methodology further exacerbates this problem. In this paper, we propose BENCHIP, a benchmark suite and benchmarking methodology for intelligence processors. The benchmark suite in BENCHIP consists of two sets of benchmarks： microbenchmarks and macrobenchmarks. The microbenchmarks consist of single-layer networks, They are mainly designed for bottleneck analysis and system optimization. The macrobenchmarks contain state-of-the-art industrial networks, so as to offer a realistic comparison of different platforms. We also propose a standard benchmarking methodology built upon an industrial software stack and evaluation metrics that comprehensively reflect various characteristics of the evaluated intelligence processors, BENCHIP is utilized for evaluating various hardware platforms, including CPUs, GPUs, and accelerators. BENCHIP will be open-sourced soon.

关键词： deep learning intelligence processor benchmark

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LACC:a hardware and software co-design accelerator for deep neural networks

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High Technology Letters 2021年第1期27卷 62-67页

作者： Yu Yong Zhi Tian Zhou Shengyuan State Key Laboratory of Computer Architecture Institute of Computing TechnologyChinese Academy of SciencesBeijing 100190P.R.China School of Computer Science and Technology University of Chinese Academy of SciencesBeijing 100049P.R.China cambricon Technologies ltd Beijing 100190P.R.China

With the increasing of data size and model size,deep neural networks(DNNs)show outstanding performance in many artificial intelligence(AI)*** the big model size makes it a challenge for high-performance and low-power running DNN on processors,such as central processing unit(CPU),graphics processing unit(GPU),and tensor processing unit(TPU).This paper proposes a LOGNN data representation of 8 bits and a hardware and software co-design deep neural network accelerator LACC to meet the *** data representation replaces multiply operations to add and shift operations in running *** accelerator achieves higher efficiency than the state-of-the-art DNN accelerators by domain specific arithmetic computing ***,LACC speeds up the performance per watt by 1.5 times,compared to the state-of-the-art DNN accelerators on average.

关键词： deep neural network(DNN) domain specific accelerator domain specific data type

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A survey of neural network accelerator with software development environments

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Journal of Semiconductors 2020年第2期41卷 20-28页

作者： Jin Song Xuemeng Wang Zhipeng Zhao Wei Li Tian Zhi SKL of Computer Architecture Institute of Computing TechnologyChinese Academy of SciencesBeijing 100190China University of Chinese Academy of Sciences Beijing 100049China cambricon Tech.ltd Beijing 100191China University of Science and Technology of China Hefei 230026China

Recent years,the deep learning algorithm has been widely deployed from cloud servers to terminal *** researchers proposed various neural network accelerators and software development *** this article,we have reviewed the representative neural network *** an entirety,the corresponding software stack must consider the hardware architecture of the specific accelerator to enhance the end-to-end *** we summarize the programming environments of neural network accelerators and optimizations in software ***,we comment the future trend of neural network accelerator and programming environments.

关键词： neural network accelerator compiling optimization programming environments

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cambricon-QR:a sparse and bitwise reproducible quantized training accelerator

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High Technology Letters 2024年第1期30卷 52-60页

作者：李楠 ZHAO Yongwei ZHI Tian LIU Chang DU Zidong HU Xing LI Wei ZHANG Xishan LI Ling SUN Guangzhong School of Computer Science and Technology University of Science and Technology of ChinaHefei 230026P.R.China State Key Laboratory of Processors Institute of Computing TechnologyChinese Academy of SciencesBeijing 100086P.R.China cambricon Tech.ltd Beijing 100191P.R.China Institute of Software Chinese Academy of SciencesBeijing 100086P.R.China

Quantized training has been proven to be a prominent method to achieve deep neural network training under limited computational *** uses low bit-width arithmetics with a proper scaling factor to achieve negligible accuracy ***-Q is the ASIC design proposed to efficiently support quantized training,and achieves significant performance ***,there are still two caveats in the ***,cambricon-Q with different hardware specifications may lead to different numerical errors,resulting in non-reproducible behaviors which may become a major concern in critical ***,cambricon-Q cannot leverage data sparsity,where considerable cycles could still be squeezed *** address the caveats,the acceleration core of cambricon-Q is redesigned to support fine-grained irregular data *** new design not only enables acceleration on sparse data,but also enables performing local dynamic quantization by contiguous value ranges(which is hardware independent),instead of contiguous addresses(which is dependent on hardware factors).Experimental results show that the accuracy loss of the method still keeps negligible,and the accelerator achieves 1.61×performance improvement over cambricon-Q,with about 10%energy increase.

关键词： quantized training sparse accelerator cambricon-QR

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DSNNs:learning transfer from deep neural networks to spiking neural networks

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High Technology Letters 2020年第2期26卷 136-144页

作者： Zhang Lei Du Zidong Li Ling Chen Yunji State Key Laboratory of Computer Architecture Institute of Computing TechnologyChinese Academy of SciencesBeijing 100190P.R.China Institute of Computing Technology Chinese Academy of SciencesBeijing 100190P.R.China cambricon Tech.ltd Beijing 100010P.R.China Institute of Software Chinese Academy of SciencesBeijing 100190P.R.China

Deep neural networks(DNNs)have drawn great attention as they perform the state-of-the-art results on many *** to DNNs,spiking neural networks(SNNs),which are considered as the new generation of neural networks,fail to achieve comparable performance especially on tasks with large problem *** previous work tried to close the gap between DNNs and SNNs but used small networks on simple *** work proposes a simple but effective way to construct deep spiking neural networks(DSNNs)by transferring the learned ability of DNNs to *** achieve comparable accuracy on large networks and complex datasets.

关键词： deep leaning spiking neural network(SNN) convert method spatially folded network

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