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第九届中国卫星导航学术年会

作者： Guoshuai Ren Wenquan Feng Xi Liu Beihang University

The AIS(Automatic Identification System)is a marine monitoring system with means of detection capabilities,providing multi-user applications for offshore *** satellite-based AIS system send the received AIS signals for analysis by one or more low orbit *** satellite-based AIS is a new navigation aid system which can be used as a complement to navigation *** AIS system is a Non-real-time communication system,using GMSK *** reception of short time burst AIS signal is facing frame synchronization,Doppler shift compensation,phase compensation,delay spread and other *** paper describes an innovative synchronization algorithm for the short burst-mode GMSK *** are several advantages of this synchronization *** signal is processed in real *** voids the loss of data caused by commonly used loop *** devised algorithm provides an excellent performance against noise,delay spread,frequency offset and phase *** demodulator using this synchronization algorithm shows that the bit error’s performance degradation is only about 0.3 dB.

关键词： short burst-mode GMSK signal detection frequency offset estimation phase offset estimation timing synchronization

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Design of Low Power and High Speed Correlators for IEEE 802.16 WiMAX Systems

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Circuits and Systems 2016年第8期7卷 1352-1360页

作者： B. Sivasankari P. Poongodi Department of Electronics & Communication Engineering SNS College of Technology Coimbatore India Department of Electronics & Communication Engineering Karpagam College of Engineering Coimbatore India

The advanced communication system uses wireless broadband access technologies which provide high speed data connectivity to the subscribers. One of the most popular wireless access technology is Worldwide Interoperability for Microwave Access (WiMAX) and it is based on IEEE 802.16 standard. WiMAX used Orthogonal Frequency Division Multiplexing (OFDM) is an effective modulation technique to improve the timing synchronization. The performance of channel is affected due to the synchronization mismatching between the transmitter and receiver ends. To achieve the timing synchronization in IEEE 802.16 systems, the cross correlator is used to synchronize the received signal with the known signal. In this paper, two high speed correlators are proposed based on Q1.15 format, which is used to validate the timing synchronization problem. The proposed work has been mapped on XC6VCX75T FPGA and simulations are carried out on the Xilinx-ISIM platform. The implementation result shows that the power delay product reduction is 40.81%, and delay reduction is 39.59% over the conventional multiplier less correlators.

关键词： Communication timing synchronization FPGA Multipliers Parallel Processing Power Delay

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Hybrid Segment Approximate Multiplication for Image Processing Applications

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Circuits and Systems 2016年第8期7卷 1701-1708页

作者： Jamuna Ramasamy Sathishkumar Nagarajan Department of Electronics & Communication Engineering SNS College of Engineering Coimbatore India Department of Electronics & Communication Engineering Sri Ramakrishna Engineering College Coimbatore India

It is critical in terms of approximate computation errors in VLSI multiplier circuits are increasing with technology scaling. The most common method for fast and energy efficient execution of multiplication result is approximation of operands. But this traditional approximate result is not suitable for image processing applications. This paper proposes the two architectures of high accurate hybrid segment approximate multiplier (HSAM) and enhanced HSAM for image compression. Existing static segment method based approximate multiplier is not suitable for certain accurate applications and dynamic segment method based approximate multiplier is not suitable for cost efficient applications. The proposed work combines the advantages of both static segment method and dynamic segment method to drive the efficiency in accuracy and cost. The proposed approximate multipliers HSAM8 × 8 and EHSAM8 × 8 provide 99.85% and 99.999% accuracy respectively for various inputs. The proposed HSAM consumes less energy with small increase of area overhead. The proposed EHSAM consumes less energy without any area overhead. The proposed HSAM and EHSAM is improved the speed by 40% and 85% compared to the existing SSM8 × 8 technique.

关键词： Communication timing synchronization FPGA Multipliers Parallel Processing Power Delay

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A NOVEL ESTIMATION METHOD OF timing OFFSET FOR OFDM BASED WLAN SYSTEMS

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Journal of Electronics(China) 2005年第1期22卷 34-41页

作者： Chong Jongwha Hanyang University Seoul 133-791 Korea

The conventional timing synchronization methods based on time domain correlation have the problems of timing metric plateau in Additive White Gaussian Noise(AWGN) channel and estimation error in multipath fading channel. To resolve the problems, this paper proposes a novel timing metric using the characteristics of long training symbols in IEEE802.11a and a new timing recovery method based on the new timing metric for Orthogonal Frequency Division MuItiplexing(OFDM)-based WLAN systems. The proposed timing metric is defined as a sum of absolute values of the imaginary parts of all the subcarrier samples. It exhibits a unique characteristic that is very sensitive to the true synchronization point since it has minimum value at the true synchronization point and maximum around the true synchronization point. The simulation results show that the performance of timing synchronization is significantly improved, as a result, the probability of error estimation is lower than 10-4 when Signal-to-Noise Ratio(SNR) is more than 10dB.

关键词： Orthogonal Frequency Division Multiplexing(OFDM) Estimation timing synchronization WLAN

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