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Resonant cavity enhanced photoluminescence of tensile strained Ge/SiGe quantum wells on silicon-on-insulator substrate

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Optoelectronics Letters 2014年第3期10卷 213-215页

作者：陈荔群陈阳华李成 Chengyi College Jimei University Department of Physics Semiconductor Photonics Research CenterXiamen University

The tensile strained Ge/SiGe multiple quantum wells （MQWs） grown on a silicon-on-insulator （SOI） substrate were fabricated successfully by ultra-high chemical vapor deposition. Room temperature direct band photoluminescence from Ge quantum wells on SOI substrate is strongly modulated by Fabry-Perot cavity formed between the surface of Ge and the interface of buried SiO2. The photoluminescence peak intensity at 1.58 μm is enhanced by about 21 times compared with that from the Ge/SiGe quantum wells on Si substrate, and the full width at half maximum （FWHM） is significantly reduced. It is suggested that tensile strained Ge/SiGe multiple quantum wells are one of the promising materials for Si-based microcavity lijzht emitting devices.

关键词： Cavity resonators Chemical vapor deposition Germanium Interfaces (materials) Photoluminescence silicon silicon on insulator technology Substrates

Ultra-thin films and multigate devices architectures for future CMOS scaling

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Science China(Information Sciences) 2011年第5期54卷 990-1003页

作者： DELEONIBUS Simon CEA-LETI MINATEC Campus Grenoble France

The nanoelectronics industry is facing historical challenges to scale down CMOS devices to meet demands for low voltage, low power, high performance and increased functionality. Using new materials and devices architectures is necessary. HiK gate dielectrics and metal gates have been introduced and have shown their ability to reduce power consumption. Fully depleted ultra-thin SOI devices are a good alternative to bulk for low power applications. Multigate devices are the current goal in device architecture to increase MOSFET drivability, reduce power, and allow new opportunities for future applications. Thin film based solutions will be necessary in the future because of fundamental limitations on gate capacitance scaling and system integration requirements. Exploiting 3D device stacking via wafer bonding could be a good way to introduce new materials (HiK, strained Si, hybrid orientations, Ge, III-Vs, Carbon-based materials, graphene and CNTs, and functional molecules) and continue increasing integration density. Si based CMOS will be scaled beyond the ITRS as the System-on-Chip/Wafer Platform.

关键词： CMOSFETs silicon strain carbon germanium silicon on insulator technology FDSOI FinFET multigates nanowires wafer bonding 3D sequential integration

Non-blocking four-port optical router based on thermooptic silicon microrings

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Optoelectronics Letters 2016年第4期12卷 268-272页

作者：党佩佩李翠婷郑文雪郑传涛王一丁 State Key Laboratory on Integrated Optoelectronics College of Electronic Science and EngineeringJilin University

By using silicon-on-insulator(SOI) platform, 12 channel waveguides, and four parallel-coupling one-microring resonator routing elements, a non-blocking four-port optical router is proposed. Structure design and optimization are performed on the routing elements at 1 550 nm. At drop state with a power consumption of 0 m W, the insertion loss of the drop port is less than 1.12 d B, and the crosstalk between the two output ports is less than-28 d B; at through state with a power consumption of 22 m W, the insertion loss of the through port is less than 0.45 d B, and the crosstalk between the two output ports is below-21 d B. Routing topology and function are demonstrated for the four-port optical router. The router can work at nine non-blocking routing states using the thermo-optic(TO) effect of silicon for tuning the resonance of each switching element. Detailed characterizations are presented, including output spectrum, insertion loss, and crosstalk. According to the analysis on all the data links of the router, the insertion loss is within the range of 0.13—3.36 d B, and the crosstalk is less than-19.46 d B. The router can meet the need of large-scale optical network-on-chip(ONo C).

关键词： Crosstalk Drops Electric power utilization Insertion losses Network on chip silicon silicon on insulator technology Structural optimization

Polarization-independent grating coupler based on silicon-on-insulator

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Chinese Optics Letters 2015年第9期13卷 34-38页

作者：张晶晶杨俊波路环宇吴闻军黄杰常胜利 Center of Material Science National University of Defense Technology State Key Laboratory on Advanced Optical Communication Systems and Networks Peking University University of Electronic Science and technology of China

A novel and simple polarization independent grating couplers is designed and analyzed here, in which the TE polarization and the TM polarization light can be simultaneously coupled into a silicon waveguide along the same direction with high coupling efficiency. For the polarization-insensitive grating coupler, the coupling effi- ciencies of two orthogonal polarizations light are more than 60% at 1550 nm wavelength based on our optimized design parameters including grating period, etching height, filling factor, and so on. For TE mode the maximum efficiency is ~72% with more than 30 nm i dB bandwidth, simultaneously, for TM mode the maximum efficiency is 75.15% with 40 nm 1 dB bandwidth. Their corresponding wavelength difference between two polarizations＇ coupling peaks is demonstrated to be 35 nm. Polarization independent grating coupler designed here can be widelv used in optical communication and ontical information processing.

关键词： Bandwidth Efficiency Optical communication Optical data processing silicon on insulator technology

Three-step lithography to the fabrication of vertically coupled micro-ring resonators in amorphous silicon-on-insulator

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Chinese Optics Letters 2015年第8期13卷 100-104页

作者：程俊严楠 School of Electromechanical Engineering Beijing Institute of Technology

A simple method to fabricate vertically coupled micro-ring resonators in amorphous silicon-on-insulator is created by a three-step lithography process. First, the linear loss at 1.55 μm of the a-Si：H film is calculated to be 0.2 =k 0.05 dB/cm. Then, the bottom line waveguide of Su-8 with a flat top surface of 300 nm is created by etching. The thickness of Su-8 can easily be controlled by the etching time. Finally, by opening the window pattern and etching several layers, the first layer marks made by electron beam lithography are found with a 50 nm resolution, and the high quality of the micro-ring resonator is demonstrated.

关键词： Electron beam lithography Etching Lithography Optical resonators Resonators silicon on insulator technology

Drain and Source on insulator MOSFETs Fabricated by Local SIMOX technology

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Journal of Semiconductors 2003年第6期24卷 592-597页

作者：何平江波林曦刘理天田立林李志坚董业明陈猛王曦清华大学微电子学研究所北京100084 中国科学院上海冶金研究所离子束实验室上海200050

To overcome the floating-body effect and self-heating effect of SOI devices,the drain and source on insulator (DSOI) structure is fabricated and *** low dose developed recently and low energy local SIMOX technology combined with the conventional CMOS technology is used to fabricate this kind of *** this method,DSOI,SOI,and bulk MOSFETs are successfully integrated on a single *** results show that the drain induced barrier lowering effect is *** breakdown voltage drain-to-source is greatly increased for DSOI devices due to the elimination of the floating-body *** the self-heating effect is also reduced and thus the reliability *** the same time,the advantage of SOI devices in speed is *** technology makes it possible to integrate low voltage,low power,low speed SOI devices or high voltage,high power,high speed DSOI devices on one chip and it offers option for developing system-on-chip technology.

关键词： SIMOX MOS devices silicon on insulator technology floating-body effect