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positive gate bias stress-induced hump-effect in elevated-metal metal-oxide thin film transistors

Chinese Physics B 2017年第12期26卷 587-590页

作者：齐栋宇张冬利王明湘 Department of Microelectronics Soochow University Suzhou 215006 China

Under the action of a positive gate bias stress, a hump in the subthreshold region of the transfer characteristic is observed for the amorphous indium-gallium-zinc oxide thin film transistor, which adopts an elevated-metal metal-oxide structure. As stress time goes by, both the on-state current and the hump shift towards the negative gate-voltage direction. The humps occur at almost the same current levels for devices with different channel widths, which is attributed to the parasitic transistors located at the channel width edges. Therefore, we propose that the positive charges trapped at the back-channel interface cause the negative shift, and the origin of the hump is considered as being due to more positive charges trapped at the edges along the channel width direction. On the other hand, the hump-effect becomes more significant in a short channel device （L=2 μm）. It is proposed that the diffusion of oxygen vacancies takes place from the high concentration source/drain region to the intrinsic channel region.

关键词： amorphous indium-gallium-zinc oxide thin film transistors positive bias stress hump

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Temperature-dependent bias-stress-induced electrical instability of amorphous indium-gallium-zinc-oxide thin-film transistors

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Chinese Physics B 2015年第7期24卷 463-467页

作者：钱慧敏于广陆海武辰飞汤兰凤周东任芳芳张荣郑有炓黄晓明 Jiangsu Provincial Key Laboratory of Advanced Photonic and Electronic Materials and School of Electronic Science and EngineeringNanjing University Collaborative Innovation Center of Advanced Microstructures Nanjing University Peter Grnberg Research Center Nanjing University of Posts and Telecommunications

The time and temperature dependence of threshold voltage shift under positive-bias stress（PBS） and the following recovery process are investigated in amorphous indium-gallium-zinc-oxide（a-IGZO） thin-film transistors. It is found that the time dependence of threshold voltage shift can be well described by a stretched exponential equation in which the time constant τ is found to be temperature dependent. Based on Arrhenius plots, an average effective energy barrier Eτ stress= 0.72 eV for the PBS process and an average effective energy barrier Eτ recovery= 0.58 eV for the recovery process are extracted respectively. A charge trapping/detrapping model is used to explain the threshold voltage shift in both the PBS and the recovery process. The influence of gate bias stress on transistor performance is one of the most critical issues for practical device development.

关键词： amorphous indium gallium zinc oxide thin-film transistors positive bias stress trapping model interface states

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