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A reconfigurable passive mixer for multimode multistandard receivers in 0.18 μm CMOS

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Journal of Semiconductors 2016年第8期37卷 77-84页

作者：樊祥宁陶健包宽王志功 Institute of RF-&OE-ICs School of Information Science and Engineering Southeast University

This paper presents a reconfigurable quadrature passive mixer for multimode multistandard receivers. By using controllable transconductor and transimpedance-amplifier stages, the voltage conversion gain of the mixer is reconfigured according to the requirement of the selected communication standard Other characteristics such as noises figure, linearity and power consumption are also reconfigured consequently. The design concept is verified by implementing a quadrature passive mixer in 0.18 μm CMOS technology. On wafer measurement results show that, with the input radio frequency ranges from 700 MHz to 2.3 GHz, the mixer achieves a controllable voltage conversion gain from 4 to 22 dB with a step size of 6 dB. The measured maximum IIP3 is 8.5 dBm and the minimum noise figure is 8.0 dB. The consumed current for a single branch （I or Q） ranges from 3.1 to 5.6 mA from a 1.8 V supply voltage. The chip occupies an area of 0.71 mm2 including pads.

关键词： reconfigurable passive mixer multi-standard current-commutating receivers CMOS

A 3-5 GHz BPSK transmitter for IR-UWB in 0.18μm CMOS

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Journal of Semiconductors 2010年第9期31卷 88-93页

作者：付德龙黄鲁蔡力林福江 Department of Electronic Science and Technology University of Science and Technology of China

This paper presents a transmitter IC with BPSK modulation for an ultra-wide band system.It is based on up-conversion with a high linearity passive mixer.Unlike the traditional BPSK modulation scheme,the local oscillator （LO） is modulated by the baseband data instead of the pulse.The chip is designed and fabricated by standard 0.18μm CMOS technology.The transmitter achieves a high data rate up to 400 Mbps.The amplitude of the pulse can be adjusted by the amplitude of the LO and the bias current of the driver amplifier.The maximum peak-to-peak amplitude of the pulse is 600 mV.It consumes only 20.3 mA current with a supply voltage of 1.8 V when transmitting a pulse at the maximum data rate.The energy efficiency is 91.4 pJ/pulse.The die area is 1.4×1.4 mm^2.

关键词： transmitter BPSK pulse generator passive mixer driver amplifier IR-UWB

A low power 3-5 GHz CMOS UWB receiver front-end

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Journal of Semiconductors 2009年第3期30卷 109-113页

作者：李伟男黄煜梅洪志良 State Key Laboratory of ASIC & System Fudan University

A novel low power RF receiver front-end for 3-5 GHz UWB is presented. Designed in the 0.13μm CMOS process, the direct conversion receiver features a wideband balun-coupled noise cancelling transconductance input stage, followed by quadrature passive mixers and transimpedance loading amplifiers. Measurement results show that the receiver achieves an input return loss below -8.5 dB across the 3.1-4.7 GHz frequency range, maximum voltage conversion gain of 27 dB, minimum noise figure of 4 dB, IIP3 of -11.5 dBm, and IIP2 of 33 dBm. Working under 1.2 V supply voltage, the receiver consumes total current of 18 mA including 10 mA by on-chip quadrature LO signal generation and buffer circuits. The chip area with pads is 1.1 × 1.5 mm^2.

关键词： UWB direct-conversion receiver low power RF CMOS passive mixer

A fully integrated direct-conversion digital satellite tuner in 0.18μm CMOS

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Journal of Semiconductors 2011年第4期32卷 111-115页

作者：陈斯杨增汪顾明亮 Xuzhou Normal University

A fully integrated direct-conversion digital satellite tuner for DVB-S/S2 and ABS-S applications is presented.A broadband noise-canceling Balun-LNA and passive quadrature mixers provided a high-linearity low noise RF front-end,while the synthesizer integrated the loop filter to reduce the solution cost and system debug time.Fabricated in 0.18μm CMOS,the chip achieves a less than 7.6 dB noise figure over a 900-2150 MHz L-band, while the measured sensitivity for 4.42 MS/s QPSK-3/4 mode is -91 dBm at the PCB connector.The fully integrated integer-N synthesizer operating from 2150 to 4350 MHz achieves less than 1℃integrated phase error. The chip consumes about 145 mA at a 3.3 V supply with internal integrated LDOs.

关键词： direct-conversion CMOS RF tuner noise-canceling LNA passive mixer

A 1.2-V CMOS front-end for LTE direct conversion SAW-less receiver

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Journal of Semiconductors 2012年第3期33卷 76-80页

作者：王日炎黄继伟李正平张伟峰曾隆月 Guangzhou Runxin Information Technology Co.Ltd College of Physics and Information Engineering Fuzhou University Institute of RF-&OE IC Southeast University

A CMOS RF front-end for the long-term evolution（LTE） direct conversion receiver is presented.With a low noise transconductance amplifier（LNA）,current commutating passive mixer and transimpedance operational amplifier（TIA）,the RF front-end structure enables high-integration,high linearity and simple frequency planning for LTE multi-band applications.Large variable gain is achieved using current-steering transconductance stages.A current commutating passive mixer with 25%duty-cycle LO improves gain,noise and linearity.A direct coupled current-input filter（DCF） is employed to suppress the out-of-band interferer.Fabricated in a 0.13-μm CMOS process,the RF front-end achieves a 45 dB conversion voltage gain,2.7 dB NF,-7 dBm IIP3,and ＋60 dBm IIP2 with calibration from 2.3 to 2.7 GHz.The total RF front end with divider draws 40 mA from a single 1.2-V supply.

关键词： RF CMOS front-end passive mixer 25%duty-cycle variable gain quadrature demodulator

A saw-less direct conversion long term evolution receiver with 25% duty-cycle LO in 130 nm CMOS technology

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Journal of Semiconductors 2013年第3期34卷 70-75页

作者：何思远张常红陶亮张伟锋曾隆月吕伟武海军 Guangzhou Runxin Information Technology Co.Ltd School of Electronic and Information Engineering South China University of Technology

A CMOS long-term evolution(LTE) direct convert receiver that eliminates the interstage SAW filter is presented.The receiver consists of a low noise variable gain transconductance amplifier(TCA),a quadrature passive current commutating mixer with a 25%duty-cycle LO,a trans-impedance amplifier(TIA),a 7th-order Chebyshev filter and programmable gain amplifiers(PGAs).A wide dynamic gain range is allocated in the RF and analog parts.A current commutating passive mixer with a 25%duty-cycle LO improves gain,noise,and linearity. An LPF based on a Tow-Thomas biquad suppresses out-of-band interference.Fabricated in a 0.13μm CMOS process,the receiver chain achieves a 107 dB maximum voltage gain,2.7 dB DSB NF(from PAD port),-11 dBm 11P3,and>+65 dBm UP2 after calibration,96 dB dynamic control range with 1 dB steps,less than 2%error vector magnitude(EVM) from 2.3 to 2.7 GHz.The total receiver(total I Q path) draws 89 mA from a 1.2-V LDO on chip supply.

关键词： RF CMOS passive mixer 25%duty-cycle saw-less noise figure Chebyshev filter LTE

A high linearity downconverter for SAW-less LTE receivers

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Journal of Semiconductors 2012年第10期33卷 66-71页

作者：蒋培晨管锐汪吴峰陈东坡周健军 School of Microelectronics Shanghai Jiao Tong University

This paper presents a high linearity downconverter implemented in a 0.18μm CMOS process for long term evolution（LTE） receivers without a surface acoustic wave（SAW） filter.The proposed downconverter is composed of a transconductance（Gm） stage,a passive mixer,a current buffer,a transimpedance（TIA） stage,and a DC-offset cancellation（DCOC） loop.The current buffer is utilized to provide very low load impedance for the passive mixer at high frequencies and reduce the output voltage swing induced by out-of-band blockers.This technique improves the input referred third-order intercept point（IIP3） and second-order intercept point（IIP2） of the down-converter by 4.5 dB and 11 dB,respectively.The measured results show that the proposed downconverter achieves a voltage conversion gain of 29.5 dB,double sideband noise figure of 12.7 dB,out-of-band IIP3 of 13 dBm and IIP2 of more than 62 dBm.

关键词： linearity downconverter long term evolution（LTE） passive mixer radio-frequency（RF） receivers

A PMMA passive Micromixer with Three-Dimensional Tortuous Mixing Chamber

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Journal of Harbin Institute of Technology(New Series) 2014年第5期21卷 85-90页

作者： He Zhang Xiao-Wei Liu Jia-Lu Tang Xiao-Wei Han Li Tian Key Laboratory of Micro-systems and Micro-structures Manufacturing Ministry of Education Harbin Institute of Technology College of Electrical and Information Engineering Heilongjiang Institute of Technology

In this paper,we design and fabricate a novel three-dimensional passive-micro-mixer by using Polymethyl methacrylate( PMMA). The mixer is fabricated by using ultra-precision engraving machine and bonded by an organic solvent fumigation bonding method. The mixer combines two fluid streams into a mixing chamber integrated with T-shaped pre-mixing and six tortuous shaped mixing elements. We have employed three-dimensional numerical simulations to evaluate the mixing efficiency. The simulation results indicate,under inlet fluid pressure p = 10( Pa), compared to the planar serpentine mixer and tortuous mixer,the concentration fluctuation range at the outlet diagonal reduce to 48% and 71. 6% respectively. And the mixing concentration variances also show that the mixing efficiency has a significant increase. We characterize the device by using visualization microscope,and the results are consistent with the simulation data. The device demonstrates the promising capabilities for micro total analysis system integration.

关键词： microfluidic passive mixer 3D tortuous microstructure

A 0.7–7 GHz wideband reconfigurable receiver RF front-end in CMOS

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Journal of Semiconductors 2018年第8期39卷 77-80页

作者： Youming Zhang Lijuan Yang Fengyi Huang Nan Jiang Xuegang Zhang Institute of RF- & OE-ICs School of Information Science and Engineering Southeast University Nanjing 210096 China S-TEK (Shanghai) High-Frequency Communication Technology Co. Ltd. Shanghai 201203 China

A 0.7–7 GHz wideband RF receiver front-end So C is designed using the CMOS process. The front-end is composed of two main blocks: a single-ended wideband low noise amplifier（LNA） and an in-phase/quadrature（I/Q） voltage-driven passive mixer with IF amplifiers. Based on a self-biased resistive negative feedback topology,the LNA adopts shunt-peaking inductors and a gate inductor to boost the bandwidth. The passive down-conversion mixer includes two parts: passive switches and IF amplifiers. The measurement results show that the frontend works well at different LO frequencies, and this chip is reconfigurable among 0.7 to 7 GHz by tuning the LO frequency. The measured results under 2.5-GHz LO frequency show that the front-end SoC achieves a maximum conversion gain of 26 dB, a minimum noise figure（NF） of 3.2 dB, with an IF bandwidth of greater than 500 MHz.The chip area is 1.67 × 1.08 mm;.

关键词： wideband LNA resistive-feedback CMOS passive mixer