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Transparent partial page migration between CPU and GPU

Frontiers of Computer Science 2020年第3期14卷 1-13页

作者： Shiqing ZHANG Zheng QIN Yaohua YANG Li SHEN Zhiying WANG Department of Computer Science National University of Defense TechnologyChangsha 410073China

Despite the increasing investment in integrated GPU and next-generation interconnect research,discrete GPU connected by PCIe still account for the dominant position of the market,the management of data communication between CPU and GPU continues to ***,the programmer explicitly controls the data transfer between CPU and *** simplify programming and enable systemwide atomic memory operations,GPU vendors have developed a programming model that provides a single,virtual address space for accessing all CPU and GPU memories in the *** page migration engine in this model automatically migrates pages between CPU and GPU on *** meet the needs of high-performance workloads,the page size tends to be *** by low bandwidth and high latency interconnects compared to GDDR,larger page migration has longer delay,which may reduce the overlap of computation and transmission,waste time to migrate unrequested data,block subsequent requests,and cause serious performance *** this paper,we propose partial page migration that only migrates the requested part of a page to reduce the migration unit,shorten the migration latency,and avoid the performance degradation of the full page migration when the page becomes *** show that partial page migration is possible to largely hide the performance overheads of full page *** with programmer controlled data transmission,when the page size is 2MB and the PCIe bandwidth is 16GB/sec,full page migration is 72.72×slower,while our partial page migration achieves 1.29×*** the PCIe bandwidth is changed to 96GB/sec,full page migration is 18.85×slower,while our partial page migration provides 1.37×***,we examine the performance impact that PCIe bandwidth and migration unit size have on execution time,enabling designers to make informed decisions.

关键词： unified memory data communication page migration partial page migration

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Superpage-Friendly page Table Design for Hybrid Memory Systems

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国际计算机前沿大会会议论文集 2020年第1期 623-641页

作者： Xiaoyuan Wang Haikun Liu Xiaofei Liao Hai Jin National Engineering Research Center for Big Data Technology and System Huazhong University of Science and TechnologyWuhan 430074China Service Computing Technology and System Lab Huazhong University of Science and TechnologyWuhan 430074China Cluster and Grid Computing Lab Huazhong University of Science and TechnologyWuhan 430074China School of Computer Science and Technology Huazhong University of Science and TechnologyWuhan 430074China

page migration has long been adopted in hybrid memory systems comprising dynamic random access memory(DRAM)and non-volatile memories(NVMs),to improve the system performance and energy ***,page migration introduces some side effects,such as more translation lookaside buffer(TLB)misses,breaking memory contiguity,and extra memory accesses due to page table *** this paper,we propose superpagefriendly page table called SuperPT to reduce the performance overhead of serving TLB *** leveraging a virtual hashed page table and a hybrid DRAM allocator,SuperPT performs address translations in a flexible and efficient way while still remaining the contiguity within the migrated pages.

关键词： page table Hybrid memory system page migration Multiple page sizes Address translation

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