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A CMOS G_m-C complex filter with a reconfigurable center and cutoff frequencies in low-IF WiMAX receivers

Journal of Semiconductors 2013年第7期34卷 140-146页

作者：程心杨海钢高同强尹韬 Institute of Electronics Chinese Academy of Sciences University of Chinese Academy of Sciences

This paper presents a reconfigurable fifth-order complex Gm-C filter for different data rates in low-IF WiMAX *** design procedure and linearized measures to realize the complex filter are *** order to achieve the reconfigurability of bandwidth window,the center frequency and the cutoff frequency filter are adjusted simultaneously by changing capacitor values while keeping transconductors ***,the filter integrates an on-chip automatic frequency tuning circuit based on a *** results show that it has an IRR of 32 dB,a THD of -43 dB,and an input-referred noise of 21μ*** chip is fabricated in 0.13μm CMOS process,occupies 0.7×1 mm2,and consumes 4.8 mA current from a 1.2 V power supply.

关键词： complex filter low-if receiver WiMAX frequency tuning

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A BFSK and OOK IF demodulation circuit with 2.8 μs settling time and re-configurable image rejection functions for MICS/BCC applications

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Journal of Semiconductors 2018年第7期39卷 104-109页

作者： Tongqiang Gao Zhenxiong Chen Siqi Zhao Haigang Yang Xinxia Cai Institute of Electronics Chinese Academy of Sciences Beijing 100190 China University of Chinese Academy of Sciences Beijing 100049 China

A BFSK and OOK IF base-band circuit is provided to implement the low-IF RF receivers for a dualband MICS/BCC network controller. In order to transfer the massive vital data immediately, the IF circuit is comprised of the fast-settling feed-forward programmable gain amplifier（PGA）, a Gm-C complex filter, the fixed gain amplifier（FGA） and a 4-input ＂quadratic sum＂ demodulator. A novel auto-switched coarse gain-setting method is adopted in the PGA to enhance the reaction speed and narrow the output signal range. Also the PGA does not suffer the same stability constraint as open-loop topologies. The complex filter fulfills the function of image rejection,in which the center frequency and bandwidth can be adjusted individually. The FGA is used to ameliorate the linearity and the ＇quadratic sum＇ demodulator can reduce the overall power consumption. The designed IF circuit is fabricated with SMIC 0.18 μm CMOS process. The chip area is about 5.36 mm^2. Measurement results are given to verify the design goals.

关键词： low-if receiver VGA complex filter MICS BCC

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