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Temperature and Process Variations Aware Dual Threshold Voltage Footed Domino Circuits leakage Management

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Journal of Semiconductors 2008年第12期29卷 2364-2371页

作者：宫娜汪金辉郭宝增庞娇河北大学电子信息工程学院保定071002 北京工业大学集成电路与系统研究室北京100124

Considering the effect of temperature and process variations, the inputs and clock signals combination sleep state dependent leakage current characteristics is analyzed and the optimal sleep state is examined in sub-65nm dual threshold voltage （V1） footed domino circuits. HSPICE simulations based on 65nm and 45nm BSIM4 models show that the proposed CLIL state （the clock signal and inputs are all low） is the optimal state to reduce the leakage current of the high fan-in footed domino circuits at high temperature and almost all footed domino circuits at room temperature, as compared to the conventional CHIL state （the clock signal is high and inputs are all low） and the CHIH state （the clock signal and inputs are all high）. Further, the influence of the process variations on the leakage current characteristics of the dual V1 footed domino circuits is evaluated. At last, temperature and process variation aware new low leakage current setup guidelines are provided.

关键词： footed domino circuit dual threshold voltage leakage current process variation

Designing leakage-Tolerant and Noise-Immune Enhanced Low Power Wide OR Dominos in Sub-70nm CMOS Technologies

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Journal of Semiconductors 2006年第5期27卷 804-811页

作者：郭宝增宫娜汪金辉河北大学电子信息工程学院保定071002 北京工业大学电子信息与控制工程学院北京100022

Two new circuit techniques to suppress leakage currents and enhance noise immunity while decreasing the active power are proposed. Eight-input OR gate circuits constructed with these techniques are simulated using 45nm BSIM4 SPICE models in HSPICE. The simulation results show that the proposed circuits effectively lower the active power, reduce the total leakage current, and enhance speed under similar noise immunity conditions. The active power of the two proposed circuits can be reduced by up to 8. 8% and 11.8% while enhancing the speed by 9.5% and 13.7% as compared to dual Vt domino OR gates with no gating stage. At the same time,the total leakage currents are also reduced by up to 80.8% and 82.4% ,respectively. Based on the simulation results,the state of the evaluation node is also discussed to reduce the total leakage currents of dual Vt dominos.

关键词： low power leakage current OR dominos noise immunity

Evaluation of structure,dielectric and electrical properties of(Li/Ta/Sb)modified(Na,K)NbO_(3) lead-free ceramics with excess Na concentration

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Journal of Advanced Dielectrics 2017年第6期7卷 12-20页

作者： Md.Kashif Shamim Arpana Singh Seema Sharma Materials Research Laboratory Department of Physics A.N CollegePatna 800013India

Polycrystalline perovskite structured Li_(0.04)(Na_(0.54+x) K_(0.46))_(0.96)(Nb_(0.81)Ta_(0.15)Sb_(0.04))O_(3) ceramics with x¼0:00,0.005 and 0.01 mole excess Na concentration were prepared by solid state sintering *** present study relates the role of excess Na addition with the stoichiometry,density,structure,dielectric and ferroelectric properties of the samples.X-ray diffraction(XRD)pattern exhibits single phase orthorhombic *** characteristic Raman modes were observed due to translational modes of cations and vibrational modes of NbO_(6) octahedra and no structural phase transition were *** confirms the formation of single phase perovskite structure and is consistent with XRD *** dielectric permittivity increases about two times,while dielectric loss decreases by four times for χ=0.01 *** electrical measurements carried by Complex Impedance spectroscopic analysis suggest negative temperature coefficient of resistance(NTCR)behavior.

关键词： Perovskite dielectric properties negative temperature coefficient of resistance(NTCR) ferroelectric properties leakage current

A Novel Single-Phase Five-Level Transformer-less Photovoltaic (PV) Inverter

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CES Transactions on Electrical Machines and Systems 2020年第4期4卷 329-338页

作者： Xiaonan Zhu Hongliang Wang Wenyuan Zhang Hanzhe Wang Xiaojun Deng Xiumei Yue College of Electrical and Information Engineering Hunan UniversityChangsha 410082China

Multilevel inverters are preferred solutions for photovoltaic(PV)applications because of lower total harmonic distortion(THD),lower switching stress and lower electromagnetic interference(EMI).In order to reduce the leakage current in the single-phase low-power PV inverters,a five-level transformer-less inverter is proposed in this paper.A total of eleven switches are required,while six of them only withstand a quarter of the dc-bus voltage,so the costs for them are *** four switches are turned on or off at the power line cycle,the switching losses for them are *** addition,the flying-capacitors(FCs)voltages are only a quarter of the dc-bus voltage,and they are balanced at the switching frequency,which further reduces the system *** experimental results based on a 1 kW prototype show that the proposed modulation strategy can balance the FCs voltages at Vdc/4 very *** the leakage current can be reduced to about 27 mA under both active and reactive operations,which satisfies the VDE 0126-1-1 standard.

关键词： leakage current multilevel inverter pulse width modulation

Dielectric properties of BaMg_(1/3)Nb_(2/3)O_(3) doped Ba_(0.45)Sr_(0.55)TiO_(3) thin films for tunable microwave applications

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Journal of Advanced Dielectrics 2015年第4期5卷 21-29页

作者： Fikadu Alema Konstantin Pokhodnya Center for Nanoscale Science and Engineering North Dakota State University Fargo ND 58108USA Agnitron Technology Incorporated Eden Prairie MN 55344USA

Ba(Mg_(1/3)Nb_(2/3))O_(3)(BMN)doped and undoped B_(0.45)Sr_(0.55)TiO_(3)(BST)thin films were deposited via radio frequency magnetron sputtering on PUTiO_(2)/SiO_(2)/Al_(2)O_(3) *** surface morphology and chemical state analyses of the films have shown that the BMN doped BST film has a smoother surface with reduced oxygen vacancy,resulting in an improved insulating properties of the BST *** tunability,loss,and leakage current(LC)of the undoped and BMN doped BST thin flms were *** BMN dopant has remarkably reduced the dielectric loss(~38%)with no significant effect on the tunability of the BST film,leading to an increase in figure of merit(FOM).This is attributed to the opposing behavior of large Mg2+whose detrimental effect on tunability is partially compensated by small Nb5+as the two substitute Ti4+in the *** coupling between Mg″_(Ti)and V_(o)charged defects suppresses the dielectric loss in the film by cutting electrons from hopping between Ti *** LC of the films was investigated in the temperature range of 300-450K.A reduced LC measured for the BMN doped BST film was correlated to the formation of defect dipoles from Mg″_(Ti),V_(o)and Nb_(Ti) charged *** carrier transport properties of the films were analyzed in light of Schottky thermionic emission(SE)and Poole-Frenkel(PF)enmission *** result indicated that while the carrier transport mechanism in the undoped film is interface limited(SE),the conduction in the BMN doped film was dominated by bulk processes(PF).The change of the conduction mechanism from SE to PF as a result of BMN doping is atributed to the presence of uncoupled Nb_(Ti) stting as a positive trap center at the shallow donor level of the BST.

关键词： Barium strontium titanate sputtering frreletric thin film tunability leakage current permitivity loss figure of merit defect dipole

Microstructure regulation and failure mechanism study of BaTiO_(3)-based dielectrics for MLCC application

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Journal of Advanced Dielectrics 2023年第2期13卷 24-31页

作者： Yan Gu Faqiang Zhang Wanghua Wu Zhifu Liu CAS Key Lab of Inorganic Functional Materials and Devices Shanghai Institute of Ceramics Chinese Academy of SciencesShanghai 200050P.R.China

Most widely used dielectrics for MLCC are based on BaTiO_(3) composition which inevitably shows performance degradation during the application due to the migration of oxygen vacancies(V_(O)¨).Here,the BaTiO_(3),(Ba_(0.97)Ca_(0.03))TiO_(3),Ba(Ti_(0.98)Mg_(0.02))O_(3),(Ba_(0.97)Ca_(0.03))(Ti_(0.98)Mg_(0.02))O_(3),(Ba0.96Ca_(0.03)Dy0.01)(Ti_(0.98)Mg_(0.02))O_(3) ceramics(denoted as BT,BCT,BTM,BCTM and BCDTM,respectively)were prepared by a solid-state reaction *** core-shell structured grains(~200 nm)featured with 10-20 nm wide shell were observed and contributed to the relatively flat dielectric constant-temperature spectra of BTM,BCTM and BCDTM *** TSDC study found that the single/mix doping of Ca^(2+),especially the Mg^(2+),Mg^(2+)/Ca^(2+)and Mg^(2+)/Ca^(2+)/Dy^(3+)could limit the emergence of V_(O)¨during the sintering and suppress its long-range migration under the *** of this,the highly accelerated lifetimes of the ceramics were increased and the value of BCDTM is 377 times higher than that of BT *** p-n junction model was built to explain the correlation mechanism between the long-range migration of V_(O)¨and the significantly increased leakage current of BT-based dielectrics in the late stage of HALT.

关键词： BaTiO_(3)-based dielectrics failure mechanism microstructure regulation oxygen vacancies leakage current

Effect of size and position of gold nanocrystals embedded in gate oxide of SiO_(2)/Si MOS structures

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Journal of Advanced Dielectrics 2016年第1期6卷 34-38页

作者： Chaitali Chakraborty Chayanika Bose Department of Electronics and Telecommunications Engineering Jadavpur University Kolkata–700032India

The influence of single and double layered gold(Au)nanocrystals(NC),embedded in SiO_(2) matrix,on the electrical characteristics of metal–oxide–semiconductor(MOS)structures is reported in this *** size and position of the NCs are varied and study is made using Sentaurus TCAD simulation *** a single NC-layered MOS structure,the role of NCs is more prominent when they are placed closer to SiO_(2)/Si-substrate interface than to SiO_(2)/Al–gate *** MOS structures with larger NC dots and double layered NCs,the charge storage capacity is increased due to charging of the dielectric in the presence of *** breakdown voltage and smaller leakage current are also obtained in the case of dual NC-layered MOS device.A new phenomenon of smearing out of the capacitance–voltage curve is observed in the presence of dual NC layer indicating generation of interface *** internal electric field developed between these two charged NC layers is expected to generate such interface traps at the SiO_(2)/Si interface.

关键词： Nanocrystals MOS capacitance-voltage curve leakage current

Low-parasitic ESD protection strategy for RF ICs in 0.35μm CMOS process

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Chinese Physics B 2006年第10期15卷 2297-2305页

作者：王源贾嵩陈中建吉利久 Institute of Microelectronics Peking University Beijing 100871 China

A systemic and comprehensive ESD-induced parasitic model is presented in this paper, which is used to analyse the parasitic influences of electrostatic discharge （ESD） protection circuits on the performance of radio frequency applications. A novel low-parasitic ESD protection structure is made in a 0.35μm 1P3M silicide CMOS process. The measured results show that this novel structure has a low parasitic capacitance about 310fF and a low leakage current about 12.2nA with a suitable ESD robustness target about 5kV human body model.

关键词： electrostatic discharge radio frequency parasitic capacitance leakage current

Interfacial and electrical characteristics of a HfO_2/n–InAlAs MOS-capacitor with different dielectric thicknesses

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Chinese Physics B 2015年第12期24卷 460-464页

作者：关赫吕红亮郭辉张义门张玉明武利翻 Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices of China School of Microelectronics Xidian University

AHfO2/n–In Al As MOS-capacitor has the advantage of reducing the serious gate leakage current when it is adopted in In As/Al Sb HEMT instead of the conventional Schottky-gate. In this paper, three kinds of Hf O2/n–InAlAs MOS-capacitor samples with different Hf O2 thickness values of 6, 8, and 10 nm are fabricated and used to investigate the interfacial and electrical characteristics. As the thickness is increased, the equivalent dielectric constant ε ox of Hf O2 layer is enhanced and the In AlAsHfO2 interface trap density Ditis reduced, leading to an effective reduction of the leakage current. It is found that the Hf O2 thickness of 10 nm is a suitable value to satisfy the demands of most applications of a HfO2/n–InAlAs MOS-capacitor, with a sufficiently low leakage current compromised with the threshold voltage.

关键词： HfO2/n–InAlAs MOS-capacitor high-k gate dielectric interface trap density leakage current