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Coseismic fault model of the 2017 M_(W)6.5 Jiuzhaigou earthquake and implications for the regional fault slip pattern

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Geodesy and Geodynamics 2022年第2期13卷 104-113页

作者： Yang Liu Yangmao Wen Zhicai Li Ying Peng Caijun Xu School of Geodesy and Geomatics Wuhan UniversityWuhan 430079China Key Laboratory of Geospace Environment and Geodesy Ministry of EducationWuhan UniversityWuhan 430079China Key Laboratory of Geophysical Geodesy Ministry of Natural ResourcesWuhan UniversityWuhan 430079China Department of Geodesy National Geomatics Center of ChinaBeijing 100830China School of Geoscience and Surveying Engineering China University of Mining and Technology-BeijingBeijing 100083China Changguang Satellite Technology Co. LtdChangchun 130102China

On August 8,2017,an M_(W)6.5 earthquake occurred in Jiuzhaigou County,Sichuan Province,China,on the eastern margin of the Qinghai-Tibet Plateau.This study investigates the coseismic deformation field and fault model with ascending and descending Sentinel-1 synthetic aperture radar(SAR)images,aftershock distribution,and elastic half-space dislocation model.The regional fault slip pattern is then quantita-tively examined using the boundary element method.The results show that the ascending and descending interferometric synthetic aperture radar(InSAR)coseismic deformation fields display an overall NNW-SSE trend,with more significant deformation on the southwest side of the fault.The coseismic fault geometry is divided into NW and SE sub-faults with strikes of 162.1°and 149.3°,respectively.The coseismic fault slip is dominated by a left-lateral strike-slip movement with an average rake of-2.31°,mainly occurring at a depth of 0-13.04 km with a shape of an approximately inverted triangle.The fault slip features two peak slip zones,with a maximum of 1.39 m.The total seismic moment is 6.34×10^(18) N·m(M_(W)6.47).The boundary element calculation quantitatively indicates that the regional fault slip pattern may be mainly attributable to the changing strike and dip.The strike changes from NNWeSSE to nearly NS direction,and the dip gradually decreases from the Jiuzhaigou earthquake fault in the north to the Huya fault in the south.With these characteristics,the Huya and the Jiuzhaigou earthquake faults form the eastern boundary of the Minshan uplift zone and accommodate the accumulated deformation.

关键词： 2017 M_(W)6.5 Jiuzhaigou earthquake InSAR fault model Boundary element method Regional fault slip pattern

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A snake addressing scheme for phase change memory testing

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Science China(Information Sciences) 2016年第10期59卷 222-232页

作者： Xiaole CUI Zuolin CHENG Chunglen LEE Xinnan LIN Yiqun WEI Xiaogang CHEN Zhitang SONG Key Laboratory of Integrated Microsystems Peking University Shenzhen Graduate School State Key Laboratory of Functional Materials for Informatics Shanghai Institute of Micro-System and Information Technology Chinese Academy of Sciences

Phase change memory(PCM) is one of the most promising candidates for next generation nonvolatile memory. However, PCM suffers from a variety of faults due to its special device structure and operation mechanism. A snake addressing scheme is introduced into the test algorithms of PCM to reduce the test time and excite proximity disturb faults more effectively. The March test algorithm with the proposed snake addressing scheme is less complex than most traditional test algorithms. In addition to conventional faults, it is capable of covering disturb and parasitic faults. Moreover, when incorporated with the sneak path testing method, it is able to test the read fault, read recovery fault, incomplete program fault 0, and false write fault.

关键词： phase change memory fault model snake addressing mode March test algorithm sneak path test method

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Quantitative evaluation modeling of mobile Ad Hoc networkcommunication service availability under failure|

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International Journal of modeling, Simulation, and Scientific Computing 2020年第6期11卷 250-267页

作者： Yanfang Fu Yichang Su Zan Wang Dengdeng Guo Fei Dai Lianjiong Zhong Jianing Wei Xi’an Technological University State and Provincial Joint Engineering Lab.of Advanced Network Monitoring and Control Xi’an 710021P.R.China Beijing Electromechanical Engineering Institute Beijing 100074 P.R.China Science and Technology on Complex System Control and Intelligent Agent Cooperation Laboratory Beijing 100074 P.R.China

The availability of network communication services is an important evaluation standard to measure the ability of the network to meet the user’s business needs.The current related research mostly focuses on the evaluation of network reliability,which cannot reflect the logical relationship between failure/maintenance and network performance parameters.Mobile Ad Hoc Network is a multi-hop,centerless and energy-constrained distributed system.Due to the dynamic change of communication environment and the instability of wireless link,Ad Hoc Network is facing great challenges in service availability.In this thesis,a fault-based quantitative evaluation model of traffic availability in Ad Hoc networks is proposed.By studying the multi-state Markov fault model of communication networks and the performance analysis of delay index based on CSMA\CA protocol,the quantitative evaluation of traffic availability in Ad Hoc networks is realized.And the availability of tactical unit network under different typical network configuration conditions is analyzed through experiments.

关键词： Network reliability service availability fault model quantitative evaluation

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VFSim： Concurrent fault Simulation at Register Transfer Level

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Journal of Computer Science & Technology 2005年第2期20卷 175-186页

作者： LiShen InstituteofComputingTechnology ChineseAcademyofSciencesBeijing100080P.R.China

VLSI testing is being pushed to the high-level based technology. In thispaper a Verilog Register transfer level model (VRM) for integrated circuits is proposed. The modelprovides a text format file, which is convenient and more practical for developing succeedingRegister Transfer Level (RTL) test tools, such as fault simulation, test pattern generation and soforth. Based on the VRM, an RTL concurrent fault simulation approach is presented. After RTL faultmodels and super faults defined, the concurrent fault simulation algorithm is given. Thecorresponding RTL concurrent fault simulator, VFSim, was implemented. The initial experiments showthat the RTL fault simulator is efficient for VLSI circuits.

关键词： high-level testing verilog RTL circuit modeling fault model concurrentfault simulation

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RESEARCH ON KEY NODES OF WIRELESS SENSOR NETWORK BASED ON COMPLEX NETWORK THEORY

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Journal of Electronics(China) 2011年第3期28卷 396-401页

作者： Ma Chuang Liu Hongwei Zuo Decheng Wu Zhibo Yang Xiaozong School of Computer science and technology Harbin Institute of Technology Harbin 150001 China

On the basis of complex network theory, the issues of key nodes in Wireless Sensor Networks (WSN) are discussed. A model expression of sub-network fault in WSN is given at first; subsequently, the concepts of average path length and clustering coefficient are introduced. Based on the two concepts, a novel attribute description of key nodes related to sub-networks is proposed. Moreover, in terms of node deployment density and transmission range, the concept of single-point key nodes and generalized key nodes of WSN are defined, and their decision theorems are investigated.

关键词： Wireless Sensor Network (WSN) Key nodes fault model Complex network theory

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On the Production Testing of Memristor Ratioed Logic (MRL) Gates

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Circuits and Systems 2016年第10期7卷 3016-3025页

作者： Ahmed Shukry Emara Ahmed Hassan Madian Hassanein Hamed Amer Sherif Hassanein Amer Mohamed Bakr Abdelhalim Electronics and Communications Engineering The American University in Cairo Cairo Egypt Radiation Energy Department Egyptian Atomic Energy Authority Cairo Egypt College of Computing and Information Technology AASTMT Cairo Egypt

This paper focuses on the production testing of Memristor Ratioed Logic (MRL) gates. MRL is a family that uses memristors along with CMOS inverters to design logic gates. Two-input NAND and NOR gates are investigated using the stuck at fault model for the memristors and the five-fault model for the transistors. Test escapes may take place while testing faults in the memristors. Therefore, two solutions are proposed to obtain full coverage for the MRL NAND and NOR gates. The first is to apply scaled input voltages and the second is to change the switching threshold of the CMOS inverter. In addition, it is shown that test speed and order should be taken into consideration. It is proven that three ordered test vectors are needed for full coverage in MRL NAND and NOR gates, which is different from the order required to obtain 100% coverage in the conventional NAND and NOR CMOS designs.

关键词： Memristors MRL Production Testing fault model fault Coverage

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A new fault rupture scenario for the 2003 Mw 6.6 Bam earthquake,SE Iran:Insights from the high-resolution QuickBird imagery and field observations

A new fault rupture scenario for the 2003 Mw 6.6 Bam earthqu...

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中国科学院地质与地球物理研究所2007学术年会

作者：付碧宏 Khaled Hessami Yoshiki Ninomiya Takashi Azuma Hisao Kondo Institute of Geology and Geophysics Chinese Academy of Sciences

The December 26,2003 M 6.6 Bam earthquake is one of the most disastrous earthquakes in Iran.QuickBird panchromatic and multispectral satellite imagery with 61 cm and 2.4 m ground resolution,respectively provide new insights into the surface rupturing process associated with this earthquake.The results indicate that this earthquake produced a 2-5 km-wide surface rupture zone with a complex geometric pattern.A 10-km-long surface rupture zone developed along the pre-existing Bam fault trace.Two additional surface rupture zones,each 2-5 km long,are oblique to the pre-existing Bam fault in angles of 20-35°.An analysis of geometric and geomorphic features also shows that movement on the Bam fault is mainly right-lateral motion with some compressional component. This interpretation is consistent with field investigations,analysis of aftershocks as well as teleseismic inversion.Therefore,we suggest that the 2003 Bam earthquake occurred on the Bam fault,and that the surface ruptures oblique to the Bam fault are caused by secondary faulting such as synthetic shears(Reidel shears).Our fault model for the Bam earthquake provides a new tectonic scenario for explaining complex surface deformations associated with the Bam earthquake.

关键词： Strike-slip faulting Surface rupture Synthetic shear fault model QuickBird imagery Bam earthquake Iran

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