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Storage wall for exascale supercomputing

Frontiers of Information Technology & Electronic Engineering 2016年第11期17卷 1154-1175页

作者： Wei HU Guang-ming LIU Qiong LI Yan-huang JIANG Gui-lin CAI College of Computer National University of Defense TechnologyChangsha 410073China National Supercomputer Center in Tianjin Tianjin 300457China

The mismatch between compute performance and I/O performance has long been a stumbling block as supercomputers evolve from petaflops to exaflops. Currently, many parallel applications are I/O intensive,and their overall running times are typically limited by I/O performance. To quantify the I/O performance bottleneck and highlight the significance of achieving scalable performance in peta/exascale supercomputing, in this paper, we introduce for the first time a formal definition of the ‘storage wall' from the perspective of parallel application scalability. We quantify the effects of the storage bottleneck by providing a storage-bounded speedup,defining the storage wall quantitatively, presenting existence theorems for the storage wall, and classifying the system architectures depending on I/O performance variation. We analyze and extrapolate the existence of the storage wall by experiments on Tianhe-1A and case studies on Jaguar. These results provide insights on how to alleviate the storage wall bottleneck in system design and achieve hardware/software optimizations in peta/exascale supercomputing.

关键词： Storage-bounded speedup Storage wall High performance computing exascale computing

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A Pipelining Loop Optimization Method for Dataflow Architecture

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Journal of Computer Science & Technology 2018年第1期33卷 116-130页

作者： Xu Tan Xiao-Chun Ye Xiao-Wei Shen Yuan-Chao Xu Da Wang Lunkai Zhang Wen-Ming Li Dong-Rui Fan Zhi-Min Tang State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China School of Computer and Control Engineering University of Chinese Academy of Sciences Beijing 1000J9 China State Key Laboratory of Mathematical Engineering and Advanced computing Wuxi 214125 China College of Information Engineering Capital Normal University Beijing 100048 China Department of Computer Science The University of Chicago Chicago IL 60637 U.S.A.

With the coming of exascale supercomputing era, power efficiency has become the most important obstacle to build an exascale system. Dataflow architecture has native advantage in achieving high power efficiency for scientific applications. However, the state-of-the-art dataflow architectures fail to exploit high parallelism for loop processing. To address this issue, we propose a pipelining loop optimization method （PLO）, which makes iterations in loops flow in the processing element （PE） array of dataflow accelerator. This method consists of two techniques, architecture-assisted hardware iteration and instruction-assisted software iteration. In hardware iteration execution model, an on-chip loop controller is designed to generate loop indexes, reducing the complexity of computing kernel and laying a good f（mndation for pipelining execution. In software iteration execution model, additional loop instructions are presented to solve the iteration dependency problem. Via these two techniques, the average number of instructions ready to execute per cycle is increased to keep floating-point unit busy. Simulation results show that our proposed method outperforms static and dynamic loop execution model in floating-point efficiency by 2.45x and 1.1x on average, respectively, while the hardware cost of these two techniques is acceptable.

关键词： dataflow model control-flow model loop optimization exascale computing scientific application

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A Parallel Hybrid Testing Technique for Tri-Programming Model-Based Software Systems

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Computers, Materials & Continua 2023年第2期74卷 4501-4530页

作者： Huda Basloom Mohamed Dahab Abdullah Saad AL-Ghamdi Fathy Eassa Ahmed Mohammed Alghamdi Seif Haridi Department of Computer Science Faculty of Computing and Information TechnologyKing Abdulaziz UniversityJeddah21589Saudi Arabia Department of Information Systems Faculty of Computing and Information TechnologyKing Abdulaziz UniversityJeddah21589Saudi Arabia Department of Software Engineering College of Computer Science and EngineeringUniversity of JeddahJeddah21493Saudi Arabia KTH Royal Institute of Technology StockholmSweden

Recently,researchers have shown increasing interest in combining more than one programming model into systems running on high performance computing systems(HPCs)to achieve exascale by applying parallelism at multiple *** different programming paradigms,such as Message Passing Interface(MPI),Open Multiple Processing(OpenMP),and Open Accelerators(OpenACC),can increase computation speed and improve *** the integration of multiple models,the probability of runtime errors increases,making their detection difficult,especially in the absence of testing techniques that can detect these *** studies have been conducted to identify these errors,but no technique exists for detecting errors in three-level programming *** the increasing research that integrates the three programming models,MPI,OpenMP,and OpenACC,a testing technology to detect runtime errors,such as deadlocks and race conditions,which can arise from this integration has not been ***,this paper begins with a definition and explanation of runtime errors that result fromintegrating the three programming models that compilers cannot *** the first time,this paper presents a classification of operational errors that can result from the integration of the three *** paper also proposes a parallel hybrid testing technique for detecting runtime errors in systems built in the C++programming language that uses the triple programming models MPI,OpenMP,and *** hybrid technology combines static technology and dynamic technology,given that some errors can be detected using static techniques,whereas others can be detected using dynamic *** hybrid technique can detect more errors because it combines two distinct *** proposed static technology detects a wide range of error types in less time,whereas a portion of the potential errors that may or may not occur depending on the 4502 CMC,2023,vol.74,no.2 operating environme

关键词： Software testing hybrid testing technique OpenACC OpenMP MPI tri-programming model exascale computing

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