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FSM deconposition VLSI architecture for dynamically reconfiguration

Journal of Harbin Institute of Technology(New Series) 2006年第3期13卷 251-254页

作者：毛志刚 Center of Microelectronics School of Astronautics Harbin Institute of Technology Harbin 150001 China

While some applications in memory can be constrained by memory bandwidth and memory cost, this paper proposes a transformation of the application into a one-bit FSM. When the finite state machine is very large, one way to improve the area and delay efficiently is to break down the large finite state machine into many smaller machines. The area efficiency can be improved if fewer machines are active simultaneously in the pipelined architecture. This can be achieved when using dynamic reconfiguration to map several sub machines onto the same hardware. This paper presents a methodology to break down the large finite state machine into many smaller machines and an architecture for the dynamically reconfiguration.

关键词： FSM FPGA dynamically reconfigurable hardware break down reconfiguration time

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dynamically reconfigurable Encryption System of the AES

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Wuhan University Journal of Natural Sciences 2006年第6期11卷 1569-1572页

作者： WANG Youren WANG Li YAO Rui ZHANG Zhai CUI Jiang College of Automation Engineering Nanjing University of Aeronautics and Astronautics Nanjing 210016 Jiangsu China

reconfigurable computing has grown to become an important and large field of research, it offers advantages over traditional hardware and software implementations of computational algorithms. The Advanced Encryption Standard （AES） algorithm is widely applied in government department and commerce. This paper analyzed the AES algorithms with different cipher keys, adopted a novel key scheduler that generated the round key real-time, proposed a dynamically reconfigurable encryption system which supported the AES algorithm with different cipher keys, and designed the architecture of the reconfigurable system. The dynamically reconfigurable AES system had been realized on FPGA. The result proves that the reconfigurable AES system is flexible, lower cost and high security level.

关键词： dynamically reconfigurable hardware field programmable gate array (FPGA) advanced encryption standard (AES) algorithm cipher key

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