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A direct-conversion WLAN transceiver baseband with DC offset compensation and carrier leakage reduction

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Journal of Semiconductors 2010年第10期31卷 86-91页

作者：袁芳颜峻马何平石寅代伐 Institute of Semiconductors Chinese Academy of Sciences Department of Electrical & Computer Engineering Auburn University

A dual-band direct-conversion WLAN transceiver baseband compliant with the IEEE 802.11 a/b/g standards is described. Several critical techniques for receiver DC offset compensation and transmitter carrier leakage rejection calibration are presented that enable the direct-conversion architecture to meet all WLAN specifications. The receiver baseband VGA provides 62 dB gain range with steps of 2 dB and a DC offset cancellation circuit is introduced to remove the offset from layout and self-mixing. The calibration loop achieves constant high-pass pole when gain changes; and a fast response time by programming the pole to 1 MHz during preamble and to 30 kHz during receiving data. The transmitter baseband employs an auto-calibration loop with on-chip AD and DA to suppress the carrier leakage, and AD can be powered down after calibration to save power consumption. The chip consumes 17.52 mA for RX baseband VGA and DCOC, and 8.3 mA for TX carrier leakage calibration （5.88 mA after calibration） from 2.85 V supply. Implemented in a 0.35μm SiGe technology, they occupy 0.68 mm^2 and 0.18 mma die size respectively.

关键词： direct-conversion WLAN DC offset carrier leakage calibration SiGe technology

A dual-band reconfigurable direct-conversion receiver RF front-end

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Journal of Semiconductors 2009年第9期30卷 91-95页

作者：姚国钦池保勇张春王志华 Institute of Microelectronics Tsinghua University

A dual-band reconfigurable wireless receiver RF front-end is presented, which is based on the directconversion principle and consists of a low noise amplifer （LNA） and a down-converter. By utilizing a compact switchable on-chip symmetrical inductor, the RF front-end could be switched between two operation frequency bands without extra die area cost. This RF front-end has been implemented in the 180 nm CMOS process and the measured results show that the front-end could provide a gain of 25 dB and IIP3 of 6 dBm at 2.2 GHz, and a gain of 18.8 dB and IIP3 of 7.3 dBm at 4.5 GHz. The whole front-end consumes 12 mA current at 1.2 V voltage supply for the LNA and 2.1 mA current at 1.8 V for the mixer, with a die area of 1.2 × 1 mm^2.

关键词： RF CMOS reconfigurable receiver direct-conversion switchable inductor

Design and optimization of a 2.4 GHz RF front-end with an on-chip balun

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Journal of Semiconductors 2011年第9期32卷 93-98页

作者：徐化王磊石寅代伐 Institute of Semiconductors Chinese Academy of Sciences Suzhou-CAS Semiconductor Integrated Technology Co. Department of Electrical and Computer Engineering Auburn University

A 2.4 GHz low-power,low-noise and highly linear receiver front-end with a low noise amplifier（LNA） and balun optimization is presented.direct conversion architecture is employed for this front-end.The on-chip balun is designed for single-to-differential conversion between the LNA and the down-conversion mixer,and is optimized for the best noise performance of the front-end.The circuit is implemented with 0.35μm SiGe BiCMOS technology.The front-end has three gain steps for maximization of the input dynamic range.The overall maximum gain is about 36 dB.The double-sideband noise figure is 3.8 dB in high gain mode and the input referred third-order intercept point is 12.5 dBm in low gain mode.The down-conversion mixer has a tunable parallel R-C load at the output and an emitter follower is used as the output stage for testing purposes.The total front-end dissipation is 33 mW under a 2.85 V supply and occupies a 0.66 mm^2 die size.

关键词： front-end LNA balun mixer direct-conversion

A low-power monolithic CMOS transceiver for 802.11b wireless LANs

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Journal of Semiconductors 2009年第1期30卷 70-76页

作者：李伟男夏玲琍郑永正黄煜梅洪志良 State Key Laboratory of ASIC and System Fudan University

A single-chip low-power transceiver IC operating in the 2.4 GHz ISM band is presented. Designed in 0.18μm CMOS, the transceiver system employs direct-conversion architecture for both the receiver and transmitter to realize a fully integrated wireless LAN product. A sigma-delta （∑△） fractional-N frequency synthesizer provides on-chip quadrature local oscillator frequency. Measurement results show that the receiver achieves a maximum gain of 81 dB and a noise figure of 8.2 dB, the transmitter has maximum output power of -3.4 dBm and RMS EVM of 6.8%. Power dissipation of the transceiver is 74 mW in the receiving mode and 81 mW in the transmitting mode under a supply voltage of 1.8 V, including 30 mW consumed by the frequency synthesizer. The total chip area with pads is 2.7 × 4.2 mm^2.

关键词： WLAN direct-conversion low power RF CMOS transceiver

A carrier leakage calibration and compensation technique for wideband wireless transceiver

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Journal of Semiconductors 2014年第6期35卷 102-108页

作者：周立国彭锦袁芳方治颜峻石寅 Institute of Semiconductors Chinese Academy of Sciences Suzhou Institute of Nano-Tech and Nano-Bionics (SINANO) Chinese Academy of Sciences

A carrier leakage calibration and compensation technique based on digital baseband for a wideband wireless communication transceiver is proposed. The digital baseband transmits a calibration signal, samples the signal which passes through the transmitter path and the calibration loop in the RF chip, measures the carrier leakage by analyzing the sampled data and compensates it. Compared with a self-calibration technique in the RF chip, the proposed technique saves area and power consumption for the wireless local area network （WLAN） solution. This technique has been successfully used for 802.1 In system and satisfies the requirement of the standard by achieving over 50 dB carrier leakage suppression.

关键词： 802.11 n WLAN direct-conversion carrier leakage calibration DC offset

Design of Software-Defined Down-conversion and Up-conversion: An Overview

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ZTE Communications 2011年第4期9卷 10-14页

作者： Yue Zhang Li-Ke Huang Carsten Maple Qing Xuan Department of Computer Science and Technology University of Bedfordshire UK Aeroflex International Ltd Stevenage UK Sino-European-Link Ltd UK

In recent years, much attention has been paid to software-defined radio （SDR） technologies for multimode wireless systems SDR can be defined as a radio communication system that uses software to modulate and demodulate radio signals. This article describes concepts, theory, and design principles for SDR down-conversion and up-conversion. Design issues in SDR down-conversion are discussed, and two different architectures, super-heterodyne and direct-conversion, are proposed. Design issues in SDR up-conversion are also discussed, and trade-offs in the design of filters, mixers, NCO, DAC, and signal processing are highlighted.

关键词： SDR down-conversion up-conversion direct-conversion super-heterodyne conversion