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Area-Optimized BCD-4221 VSLI Adder Architecture for High-Performance Computing

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Journal of Harbin Institute of Technology(New Series) 2024年第3期31卷 31-38页

作者： Dharamvir Kumar Manoranjan Pradhan Department of Electronics&Telecommunication Engineering Veer Surendra Sai University of TechnologyBurla 768018India

Decimal arithmetic circuits are promising to provide a solution for accurate decimal arithmetic operations which are not possible with binary arithmetic circuits.They can be used in banking,commercial and financial transactions,scientific measurements,etc.This article presents the Very Large Scale Integration(VLSI)design of Binary Coded Decimal(BCD)-4221 area-optimized adder architecture using unconventional BCD-4221 representation.Unconventional BCD number representations such as BCD4221 also possess the additional advantage of more effectively representing the 10's complement representation which can be used to accelerate the decimal arithmetic operations.The design uses a binary Carry Lookahead Adder(CLA)along with some other logic blocks which are required to perform internal calculations with BCD-4221 numbers.The design is verified by using Xilinx Vivado 2016.1.Synthesis results have been obtained by Cadence Genus16.1 synthesis tool using 90 nm technology.The performance parameters such as area,power,delay,and area-delay Product(ADP)are compared with earlier reported circuits.Our proposed circuit shows significant area and ADP improvement over existing designs.

关键词： VLSI design unconventional BCD representation BCD adder circuit computer arithmetic digital circuit

digital circuit Design and Simulation of a New Time-Delay Hyperchaotic System

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Digital Circuit Design and Simulation of a New Time-Delay Hy...

Design of digital circuit Experiment Course Based on FPGA

The 2011 International Conference on Computing,Information and Control(ICCIC 2011)

作者： Zhang Xiao-hong Zhang Zhi-guang Jiangxi University of Science and Technology

A four-dimensional hyperchaotic system based on Lu ＆＆ chaotic system is designed by linear feedback expansion. Dynamic characteristics of the system have been further studied after the introduction of time delays. A method of designing time-delay hyperchaotic digital circuit based on DSP Builder is presented. The new hyperchaotic system is discretized prior to overcome the inherent shortcomings by analog circuit. By optimization of digital circuit design and rational configuration of parameters,the signal amplitude is reasonably controlled. In computer simulations,results by DSP Builder fully consistent with results of the continuous system in Matlab,which shows the development of digital hyperchaotic system based on FPGA possesses practical applications.

关键词： Time-delay hyperchaotic system digital circuit DSP Builder FPGA

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World Journal of Engineering and Technology 2021年第2期9卷 346-356页

作者： Lei Zhao Electronic Experimental Center Chengdu University of Information Technology Chengdu China

With the development of integrated circuit, the content of digital circuit experiment course is constantly updated. In order to keep up with the development trend of the Times and make students’ professional knowledge meet the needs of the industry, the school adopts the FPGA experimental platform to carry out teaching reform from the two aspects of platform and experiment, and carry out reasonable experimental planning to enrich the experimental content. In this paper, the traditional knowledge points of logic algebra, trigger, timer, counter, decoder and digital tube are organically combined, and the digital clock system is designed and realized. The practice shows that the combination of modern design method and traditional digital circuit teaching method can play a good teaching effect. In this way, students can also fully learn, understand and skillfully use the new technology in the experiment, and in the process of building a comprehensive understanding of digital circuits.

关键词： digital circuit FPGA circuit Design Software Simulation digital Clock System

Design of Hybrid True Random Number Generator for Cryptographic Applications

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Computer Systems Science & Engineering 2022年第11期43卷 423-437页

作者： S.Nithya Devi S.Sasipriya Electronics and Communication Engineering Dr.N.G.P.Institute of TechnologyCoimbatore641110India Electronics and Communication Engineering Sri Krishna College of Engineering and TechnologyCoimbatore641008India

In real-time applications,unpredictable random numbers play a major role in providing cryptographic and encryption processes.Most of the existing random number generators are embedded with the complex nature of an amplifier,ring oscillators,or comparators.Hence,this research focused more on implementing a Hybrid Nature of a New Random Number Generator.The key objective of the proposed methodology relies on the utilization of True random number generators.The randomness is unpredictable.The additions of programmable delay lines will reduce the processing time and maintain the quality of randomizing.The performance comparisons are carried out with power,delay,and lookup table.The proposed architecture was executed and verified using Xilinx.The Hybrid TRNG is evaluated under simulation and the obtained results outperform the results of the conventional random generators based on Slices,area and Lookup Tables.The experimental observations show that the proposed Hybrid True Random Number Generator(HTRNG)offers high operating speed and low power consumption.

关键词： True random number generators lookup table random number generator digital circuit seed

Bounded Algebra and Current-Mode digital circuits

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Journal of Computer Science & Technology 1999年第6期14卷 551-557页

作者：吴训威 MassoudPedram InstituteofcircuitsandSystems NingboUniversityNingbo315211PR.China DepartmentofElectricalEngineeri

This paper proposes two bounded arithmetic operations, which areeasily realized with current signals. Based on these two operations, a bounded algebra system suitable for describing current-mode digital circuits is developed andits relationship with the Boolean algebra, which is suitable for representing voltagemode digital circuits, is investigated. Design procedure for current-mode circuitsusing the proposed algebra system is demonstrated on a number of common circuit elements which are used to realize arithmetic operations, such as adders andmultipliers.

关键词： current operation bounded algebra current signal digital circuit

A PRACTICAL METHOD OF DESIGNING SEQUENTIAL circuitS WITH MULTI-INPUT AND MULTI-STATE

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Journal of Electronics(China) 1988年第1期5卷 67-72页

作者：曾光橦 Qingdao Ucean Shipping Manners College

A practical method of directly designing sequential circuits by use of state transitiondiagrams is described.This method has many advantages.It is easy to use and especially suitable formulti-input and multi-state con... 详细信息

关键词： Electronic eircuit Sequential circuit digital circuit

Characterization of Fundamental Logics for the Sub-Threshold digital Design

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Journal of Electronic Science and Technology 2013年第4期11卷 382-387页

作者： Yan-Ming He Ya-Juan He Yang-Ming Li Shao-Wei Zhen Ping Luo the School of Microelectronics and Solid-State Electronics University of Electronics Science and Technology of China

digital circuits operating in the sub-threshold regime consume the least energy. The strict energy constraints are desired in the applications which work at the lowest possible supply voltage. On the other hand, the conventional design flow utilizes the technology library provided by the foundry with a fixed voltage boundary, which causes problems when the supply scales down to the sub-threshold regime. In this paper, we present a design methodology to characterize the existing cell library with Liberty NCX to facilitate the standard design flow. It is demonstrated in 0.13 μm complementary metal-oxide-semiconductor （CMOS） technology with the supply voltage of 300 mV.

关键词： Characterization digital circuit lowpower sub-threshold voltage technology library.