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CORBA-Based Discrete Event Simulation System

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Journal of Systems Engineering and Electronics 2001年第3期12卷 16-19页

作者： Luo, J. Zheng, S. Zhong, L. Duan, F. Neocomputer Research Xi'an Jiaotong University Xi'an 710049 China

The CORBA technique is an integration of the object-oriented conception and distributed computing technique. It can make the application within distributed heterogeneous environments reusable, portable and interoperable. The architecture of CORBA-based discrete event simulation systems is presented and the interface of distributed simulation objects (DSO) is defined in this paper after the DSO is identified and the synchronization mechanism among DSO is discussed.

关键词： Computational methods computer architecture computer simulation computer software portability computer software reusability Interfaces (computer) Interoperability Object oriented programming Synchronization

A Multi-agent Based Evaluation Framework and Its Applications

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IEEE/CAA Journal of Automatica Sinica 2014年第2期1卷 218-224页

作者： Jinlong Wang Qianchuan Zhao Haitao Li Center for Intelligent and Networked System Department of AutomationTsinghua University

The evaluation system is significant for assessment of technologies, experiments, energy cost and effectiveness, especially for the complicated engineering systems, such as energy systems, weapon systems and spacecraft systems. However, as engineering systems become more and more distributed and heterogeneous, evaluation frameworks need to be more universal,distributed and interactive. In this paper, we compare several typical evaluation frameworks and propose a novel evaluation framework based on multi-agent technology. We provide two case studies, indoor comfort system and technology assessment of spacecraft systems, respectively. The results show that the proposed framework can work efficiently.

关键词： Multi-agent systems Standards Indexes Measurement Robot sensing systems Data models computer architecture

Hardware architecture for RSA Cryptography Based on Residue Number System

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Transactions of Tianjin University 2012年第4期18卷 237-242页

作者：郭炜刘亚灵白松辉魏继增孙达志 School of computer Science and Technology Tianjin University

A parallel architecture for efficient hardware implementation of Rivest Shamir Adleman(RSA) cryptography is *** number system(RNS) is introduced to realize high parallelism,thus all the elements under the same base are independent of each other and can be computed in ***,a simple and fast base transformation is used to achieve RNS Montgomery modular multiplication algorithm,which facilitates hardware *** on transport triggered architecture(TTA),the proposed architecture is designed to evaluate the performance and feasibility of the *** these optimizations,a decryption rate of 106 kbps can be achieved for 1 024-b RSA at the frequency of 100 MHz.

关键词： residue number system RSA cryptography Montgomery algorithm computer architecture parallelalgorithm

Research of Crossbar Switch of High Performance Network of Signal Processing System

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Journal of Beijing Institute of Technology 2006年第1期15卷 85-90页

作者：何宾韩月秋 School of Information Science and Technology Beijing Institute of Technology Beijing100081 China School of Information Science and Technology Beijing University of Chemical Technology Beijing100029 China School of Information Science and Technology Beijing Institute of Technology Beijing100081

The new type of embedded signal processing system based on the packet switched network is achieved. According to the application field and the-characteristics of signal processing system, the RapidIO protocol is used to solve the high-speed interconnection of multi-digital signal processor （DSP）. Based on this protocol, a kind of crossbar switch module which is used to interconnect multi-DSP in the system is introduced. A route strategy, some flow control rules and error control rules, which adapt to different RapidIO network topology are also introduced. Crossbar switch performance is analyzed in detail by the probability module. By researching the technique of crossbar switch and analyzing the system performance, it has a significant meaning for building the general signal processing system.

关键词： RapidlO protocol crossbar switch signal processing system computer architecture

Transformer-Based Under-sampled Single-Pixel Imaging

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Chinese Journal of Electronics 2023年第5期32卷 1151-1159页

作者： TIAN Ye FU Ying ZHANG Jun School of Information and Electronics Beijing Institute of Technology Advanced Research Institute of Multidisciplinary Science Beijing Institute of Technology Yangtze Delta Region Academy of Beijing Institute of Technology School of computer Science and Technology Beijing Institute of Technology

Single-pixel imaging, as an innovative imaging technique, has attracted much attention during the last decades. However, it is still a challenging task for single-pixel imaging to reconstruct high-quality images with fewer measurements. Recently, deep learning techniques have shown great potential in single-pixel imaging especially for under-sampling cases. Despite outperforming traditional model-based methods, the existing deep learning-based methods usually utilize fully convolutional networks to model the imaging process which have limitations in long-range dependencies capturing, leading to limited reconstruction performance. In this paper, we present a transformer-based single-pixel imaging method to realize high-quality image reconstruction in undersampled situation. By taking advantage of self-attention mechanism, the proposed method is good at modeling the imaging process and directly reconstructs high-quality images from the measured one-dimensional light intensity sequence. Numerical simulations and real optical experiments demonstrate that the proposed method outperforms the state-of-the-art single-pixel imaging methods in terms of reconstruction performance and noise robustness.

关键词： Imaging computer architecture Optical computing Transformers Optical imaging Noise robustness Optical noise

A Novel Robust Online Extreme Learning Machine for the Non-Gaussian Noise

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Chinese Journal of Electronics 2023年第1期32卷 130-139页

作者： GU Jun ZOU Quanyi DENG Changhui WANG Xiaojun College of Information Engineering Dalian Ocean University School of software Engineering South China University of Technology School of Management Science and Engineering Dongbei University of Finance and Economics

Samples collected from most industrial processes have two challenges: one is contaminated by the non-Gaussian noise, and the other is gradually *** feature can obviously reduce the accuracy and generalization of models. To handle these challenges, a novel method, named the robust online extreme learning machine(RO-ELM), is proposed in this paper, in which the least mean p-power criterion is employed as the cost function which is to boost the robustness of the ELM, and the forgetting mechanism is introduced to discard the obsolescence samples. To investigate the performance of the ROELM, experiments on artificial and real-world datasets with the non-Gaussian noise are performed, and the datasets are from regression or classification problems. Results show that the RO-ELM is more robust than the ELM, the online sequential ELM(OS-ELM) and the OSELM with forgetting mechanism(FOS-ELM). The accuracy and generalization of the RO-ELM models are better than those of other models for online learning.

关键词： Technological innovation Extreme learning machines computer architecture Aging Cost function Robustness Computational complexity

Vector Memory-Access Shuffle Fused Instructions for FFT-Like Algorithms

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Chinese Journal of Electronics 2023年第5期32卷 1077-1088页

作者： LIU Sheng YUAN Bo GUO Yang SUN Haiyan JIANG Zekun College of computer National University of Defense Technology

The shuffle operations are the bottleneck when mapping the FFT-like algorithms to the vector single instruction multiple data(SIMD) *** propose six(three pairs) innovative vector memoryaccess shuffle fused instructions, which have been proved mathematically. Combined with the proposed modified binary-exchange method, the innovative instructions can efficiently address the bottleneck problem for decimationin-frequency or decimation-in-time(DIF/DIT) radix-2/4FFT-like algorithms, reach a performance improvement by 17.9%–111.2% and reduce the code size by 5.4%–39.8%.In addition, the proposed instructions fit some hybridradix FFTs and are suitable for the terms of the initial or result data placement for general algorithms. The software and hardware costs of the proposed instructions are moderate.

关键词： Costs Codes Software algorithms computer architecture Software Hardware

Component-Based Software Reuseon the World Wide Web

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Wuhan University Journal of Natural Sciences 2000年第1期5卷 31-34页

作者： Sang, Da-yong Wang, Ying Wuhan Univ Wuhan China

Component-based software reuse (CBSR) has been widely used in software developing practice and has an even more brilliant future with the rapid extension of the Internet, because World Wide Web (WWW) makes the large scale of component resources from different vendors become available to software developers. In this paper, an abstract component model suitable for representing components on WWW is proposed, which plays important roles both in achieving interoperability among components and among reusable component libraries (RCLs). Some necessary changes to many aspects of component management brought by WWW are also discussed, such as the classification of components and the corresponding searching methods, and the certification of components.

关键词： computer architecture Interoperability Software engineering World Wide Web

Fault-Tolerant Design Techniques in ACMP architecture

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Wuhan University Journal of Natural Sciences 2005年第1期10卷 5-8页

作者： YAOWen.bin WANGDong-sheng DepartmentofcomputerScienceandTsinghuaUniversity Beijing100084China／／ResearchInstituteofInformationTsinghuaUniversityBeijing100084ChinaTechnologyTechnology ResearchInstituteofInformationTechnology TsinghuaUniversityBeijing100084China

Single-chip multiprocessor (CMP) combined with the fault-loleranl(FT)techniques offers an ideal architecture to achieve high availability on the basis of sustaining highcomputing performance FT design of a single-chip multiprocessor is described, including thetechniques from hard-wart redundancy to software support and firmware strategy. The design aims atmasking the influences of errors and automatically correcting the system states.

关键词： computer architecture fault-tolerant design single-chip multiprocessor