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computer architecture, Supercomputer,and over-clock(上)

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电子测试 2000年第4期 20-20页

作者：严立群

时间回到十七年前,当年我还是一个中学三年级的学生。某天,又到了上历史课的时候了。我的历史老师是个用心的好老师,除了上课之外,她也会和学生说说家常,谈一些人生的经验。不过,到了现在,我印象最深的是那天她说了一句很有意思的话。她... 详细信息

时间回到十七年前,当年我还是一个中学三年级的学生。某天,又到了上历史课的时候了。我的历史老师是个用心的好老师,除了上课之外,她也会和学生说说家常,谈一些人生的经验。不过,到了现在,我印象最深的是那天她说了一句很有意思的话。她说:“我今天本来不舒服,但想到各位求知若渴的眼神,让我不得不打起精神来为各位好好地上课……”

关键词：计算机组织 Supercomputer,and over-clock computer architecture 求知若渴资讯中学时代汇编语言程序语言超级电脑

28th Annual International Symposium on computer architecture: June 30-July 4,2001,Goteborg,Sweden

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28th Annual International Symposium on Computer Architecture...

Review on Security Defense Technology Research in Edge Computing Environment

2001年

作者： Annual international symposium on computer architecture

来源：畅想之星图书光盘版（南... 评论

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Chinese Journal of Electronics 2024年第1期33卷 1-18页

作者： Ke SHANG Weizhen HE Shuai ZHANG National Digital Switching System Engineering and Technological R&D Center

Edge computing, which achieves quick data processing by sinking data computing and storage to the network edge, has grown rapidly along with the Internet of things. The new network architecture of edge computing brings new security challenges. Based on this, this paper investigates the edge computing security literature published in recent years and summarizes and analyzes research work on edge computing security from different attack surfaces. We start with the definition and architecture of edge computing. From the attack surface between device and edge server, as well as on edge servers, the research describes the security threats and defense methods of edge computing. In addition, the cause of the attack and the pros and cons of defense methods is introduced. The challenges and future research directions of edge computing are given.

关键词： Cloud computing Systems architecture computer architecture Network architecture Data processing Security Servers

Skyway:Accelerate Graph Applications with a Dual-Path architecture and Fine-Grained Data Management

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Journal of computer Science & Technology 2024年第4期39卷 871-894页

作者： Mo Zou Ming-Zhe Zhang Ru-Jia Wang Xian-He Sun Xiao-Chun Ye Dong-Rui Fan Zhi-Min Tang Institute of Computing Technology Chinese Academy of SciencesBeijing 100190China University of Chinese Academy of Sciences Beijing 100049China Institute of Information Engineering Chinese Academy of SciencesBeijing 100045China Department of computer Science Illinois Institute of TechnologyChicagoIL 60616U.S.A.

Graph processing is a vital component of many AI and big data ***,due to its poor locality and complex data access patterns,graph processing is also a known performance killer of AI and big data *** this work,we propose to enhance graph processing applications by leveraging fine-grained memory access patterns with a dual-path architecture on top of existing software-based graph *** first identify that memory accesses to the offset,edge,and state array have distinct locality and impact on *** then introduce the Skyway architecture,which consists of two primary components:1)a dedicated direct data path between the core and memory to transfer state array elements efficiently,and 2)a data-type aware fine-grained memory-side row buffer hardware for both the newly designed direct data path and the regular memory hierarchy data *** proposed Skyway architecture is able to improve the overall performance by reducing the memory access interference and improving data access efficiency with a minimal *** evaluate Skyway on a set of diverse algorithms using large real-world *** a simulated fourcore system,Skyway improves the performance by 23%on average over the best-performing graph-specialized hardware optimizations.

关键词： graph application computer architecture memory hierarchy

architecture Design of Protocol Controller Based on Traffic-Driven Software Defined Interconnection

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Chinese Journal of Electronics 2024年第2期33卷 362-370页

作者： Peijie LI Jianliang SHEN Ping LYU Chunlei DONG Ting CHEN Information Engineering University

To solve the problems of redundant logic resources and poor scalability in protocol controller circuits among communication networks, we propose a traffic-driven software defined interconnection(TSDI) *** unified software defined interconnection interface standards and the normalized interconnection topology are designed to implement the architecture of TSDI-based protocol controller. The key indicators of power, performance and area(PPA) can be realized while resolving the flexible interconnection of the controller. We designed a TSDI-based Rapid IO controller as an example. Compared to traditional designs, the design could achieve more protocol scalability,and Rapid IO protocol standards of Gen4 could be supported directly. The key PPA indicators, such as a lower delay of 56.1 ns and more than twice throughput of 98.1 Gbps, were achieved at the cost of a 23.4% area increase.

关键词： Protocols Software design Scalability Integrated circuit interconnections Process control computer architecture Throughput

Method and Practice of Trusted Embedded Computing and Data Transmission Protection architecture Based on Android

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Chinese Journal of Electronics 2024年第3期33卷 623-634页

作者： Yichuan WANG Wen GAO Xinhong HEI Yanning DU School of computer Science and Engineering Xi'an University of Technology Shaanxi Key Laboratory for Network Computing and Security Technology

In recent years,the rapid development of Internet technology has constantly enriched people's daily life and gradually changed from the traditional computer terminal to the mobile *** with it comes the security problems brought by the mobile *** for Android system,due to its open source nature,malicious applications continue to emerge,which greatly threatens the data security of ***,this paper proposes a method of trusted embedded static measurement and data transmission protection architecture based on Android to reduce the risk of data leakage in the process of terminal storage and *** conducted detailed data and feasibility analysis of the proposed method from the aspects of time consumption,storage overhead and *** experimental results show that this method can detect Android system layer attacks such as self-booting of the malicious module and improve the security of data encryption and transmission process *** with the native system,the additional performance overhead is small.

关键词： Embedded computing Protocols Data security computer architecture Encryption Internet Data communication

computer architecturea quantitative approach = 计算机体系结构量化研究方法 4th ed.

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Physical Design Methodology for Godson-2G Microprocessor

2007年

作者： Hennessy John L.John L. Hennessy David A. Patterson. Patterson David A.

来源：畅想之星图书光盘版（南... 评论

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Journal of computer Science & Technology 2010年第2期25卷 225-231页

作者：赵继业刘动郇丹丹苏孟豪肖斌徐英史峰陈晨王松 Institute of Computing Technology Chinese Academy of Sciences Graduate University of Chinese Academy of Sciences China Graduate University of Chinese Academy of Sciences

The Godson-2G microprocessor is a high performance SOC which integrates a four-issue 64-bit high performance CPU core （called GS464）, a DDR2/3 controller, a HyperTransport controller, a PCI/PCI-X controller, etc. It is physically implemented in 65 nm CMOS process and reaches the frequency of 1GHz with power consumption less than 4 W. The main challenges of Godson-2G physical implementation include nanometer process technology effects, high performance design targets, and tight schedule. This paper describes the key innovative features of physical design methodology which had been used in Godson-2G physical implementation, with particular emphasis on interconnect driven floorplan generation （ICD-FP）, adapted boundary constraints design optimization （ABC-OPT）, automatic register group clock tree generation methodology （ARG-CTS）.

关键词： computer architecture Godson-2G physical design methodology nanometer process

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Research Progress of UniCore CPUs and PKUnity SoCs

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Journal of computer Science & Technology 2010年第2期25卷 200-213页

作者：程旭王箫音陆俊林易江芳佟冬管雪涛刘锋刘先华杨春冯毅 Microprocessor Research and Development Center Peking University

CPU and System-on-Chip （SoC） are two key technologies of IT industry. During the course of ten years of research, we have defined the UniCore instruction set architecture, and designed the UniCore CPU and the PKUnity SoC family. This cross-disciplinary practice has also fostered many innovations in microprocessor architecture, optimizing compilers, low power design, functional verification, physical design, and so on. In the mean time, we have put technology transfer on the list of our top priorities. This effort has led to several marketable products, such as ultra mobile personal computers, secure micro-workstations and 3C-converged consumer electronics. The development of the next generation products, the 64-bit multi-core CPU and SoC, is also underway. They will find their applications in secure and adaptable computers for mobile and desktop, as well as personal digital multimedia devices. Being consistent with the philosophy and the long-term plan, and by leveraging the cutting-edge process technology, we will continue to make more innovations in CPUs and SoCs, and strengthen our commitment to technology transfer.

关键词： computer architecture UniCore microprocessor PKUnity SoC

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