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A Three-Stage Operational Amplifier for a Wide Range of capacitive loads

Journal of Semiconductors 2007年第11期28卷 1685-1689页

作者：胡晶晶 Huijsing J H 任俊彦上海复旦大学微电子学系专用集成电路与系统国家重点实验室上海201203 荷兰代尔夫特理工大学电子仪器实验室

This paper presents a three-stage CMOS operational amplifier （opamp） that combines accuracy with stability for a wide range of capacitive loads. A so-called quenching capacitor is added to a multipath nested Miller compensation （MNMC） topology to obtain stability for a wide range of capacitive loads. Theoretical analysis and mathematical formulas are provided to prove the improvement in stability. A prototype of this frequency compen- sation scheme is implemented in a 0.7μm CMOS process. Measurement′s show that the amplifier can drive capaci- tive loads ranging from 100pF to 100/μF with a gain of 90dB and a minimum phase margin of 26°. The amplifier has a unity-gain bandwidth of 1MHz for a 100pF capacitive load. It employs a quenching capacitance of 18pF.

关键词： operational amplifier frequency compensation phase margin capacitive loads

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Some Explanation on Vector Diagram for Power System Analysis

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Journal of Energy and Power Engineering 2022年第1期16卷 7-12页

作者： Erdene Adiyasuren Enkh-Od Erdene Mongolian University of Science and Technology Ulaanbaatar 14191Mongolia

The generating currents in the generator and the dissipating current at the load are completely different and they are out of *** magnitude of those currents is equal and the direction is opposite to each *** resistive,inductive and capacitive loads dissipate completely different voltages which concern each of character of these *** direction of vectors of generated voltage and dissipated voltage must be drawn opposite to each other in the vector *** vector of consumed voltage at the resistive load and the vector of the current through this load are in phase while the vector of generated voltage of the main source is out of *** resistive load consumes the voltage which is generated by the main *** inductive load consumes the voltage which is induced or generated in the inductor caused by the inductance due to the current flow through the *** vectors of consumed voltage at the inductive load and the vector of current through this load are in phase while the vector of generated voltage in the inductor caused by the inductance is out of *** capacitive load consumes the voltage which is generated at the capacitor caused by the capacitance due to the current flow through the *** vector of consumed voltage at the capacitive load and the vectors of current through this load are in phase while the vector of generated voltage at the capacitor caused by the capacitance is out of phase.

关键词： Generated and dissipated voltage and current resistive inductive capacitive loads phase and vector diagram

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