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A Design of 2-Stage Voltage Ramp-Up SRAM Physical Unclonable Function

Chinese Journal of Electronics 2024年第2期33卷 371-379页

作者： Minte SONG Nan LIU Shuaiyang ZHOU Zhengguang WANG Zhanqiang RU Peng DING Wei HUANG Helun SONG School of Nano-Tech and Nano-Bionics University of Science and Technology of China Suzhou Institute of Nano-Tech and Nano-Bionics Chinese Academy of Sciences

Silicon physical unclonable function（PUF） implemented by static random access memory（SRAM）exists inherent demerit of unstable cells due to noise of environment and circuits, which significantly restricts its reproducibility. In this paper, a 16T SRAM cell with reset-delay circuit and a 2-stage voltage ramp up is fabricated and reported. Compared to conventional SRAM structure, each PUF cell adds a pair of pull-up PMOS（P-channel metal oxide semiconductor） and pull-down NMOS（N-channel metal oxide semiconductor） controlled by reset and delayedreset signals respectively, resulting in two positive feedback stages with different amplification coefficients when the voltage is ramped up. PUF array consists of 4064 cells, 322 dummy cells and a group of 8 series-connected inverters with an area of 304 μm × 650 μm to match the digital post-processing module. PUF test chip was fabricated in HHGrace 110 nm platform with total area 1140 × 1140 μm2. The average HDintra（intra-chip Hamming distance, also bit error rate, BER） and HDinter（inter-chip Hamming distance） values of the 50 PUF chips in SOP16 package measured at normal point（1.5 V/25 ℃） were 1.92% and 49.85%, respectively.

关键词： semiconductor device measurement Circuits Bit error rate Metals Aging Physical unclonable function Reproducibility of results

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A Multi-Channel CMOS Analog Front-End Interface IC with 157.8 d B Current Detection Dynamic Range

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Chinese Journal of Electronics 2024年第2期33卷 393-402页

作者： Kunyu WANG Wenjing XU Chengbin ZHANG Yanjun YANG Man-Kay LAW Li ZHOU Jie CHEN Ming CHEN Institute of Microelectronics of the Chinese Academy of Science University of Chinese Academy of Sciences Zunyi Normal University Institute of Microelectronics and Dept.of ECE FST University of Macau

A high dynamic range and low-noise CMOS(complementary metal-oxide-semiconductor transistor)front-end interface integrated circuit(IC) with multi-channel detection is presented in this paper. Two different current detection channels, composed of a trans-impedance amplifier(TIA) and an integrator-differentiator TIA, are used to boost the current detection range. A capacitance-coupled instrument amplifier(CCIA) is also included to realize high precision voltage detection. A fourth-order sigma-delta modulator using a second-order loop filter and a second-order noise shaping integral quantizer is adopted to realize effective number of bits above 16 bits. The presented interface IC is implemented in 0.18-μm CMOS process with supply voltage of 3.3 V, and a proto-type electrochemical sensor platform with miniaturized sensor array is developed to verify the functionality of the interface IC. measurement results indicate that the designed interface IC achieves 157.8 d B current detection dynamic range, and the measured input-referred current noise and voltage noise floor are 1.04 p A and 58.4 n V within 10 k Hz integration bandwidths,respectively.

关键词： Integrated circuits Sigma-delta modulation semiconductor device measurement Voltage measurement Current measurement Noise Bandwidth

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Non-Contact Inter-Chip Data Communications Technology for System in a Package

Non-Contact Inter-Chip Data Communications Technology for Sy...

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2004 7th International Conference on Solid-State and Integrated Circuits Technology（ICSICT 2004）

作者： Tadahiro Kuroda Department of Electronics and Electrical Engineering Keio UniversityYokohamaJapan

＜正＞A wireless bus for stacked chips in a package is *** uses inductive coupling of metal inductors on the *** paper discusses inductive inter-chip signaling,transceiver circuit design,modeling of magnetic field and electric circuits,theory for inductor layout optimization,cross talk analysis in its array arrangement,and cross talk countermeasures.A transceiver is designed and fabricated in 0.35μm CMOS and *** maximum data rate is 1.2Gb/s/channel with 45mW from 3.3V in 300μm *** talk is measured by an embedded voltage detector on the *** agreements are found between the measurements and the theoretical *** is found that cross talk is minimized by arranging channels at intervals of a certain distance.A technique based on Time Division Multiple Access is also proposed to further reduce the cross talk.

关键词： Data communication Communications technology Packaging semiconductor device measurement Inductors Transceivers Magnetic field measurement Coupling circuits Circuit synthesis semiconductor device modeling

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