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Efficiency of Cache Mechanism for network processors

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Tsinghua Science and Technology 2009年第5期14卷 575-585页

作者：徐波常剑黄诗萌薛一波李军 Department of Automation Tsinghua University Research Institute of Information Technology(RIIT) Tsinghua University School of Software Tsinghua University Tsinghua National Lab for Information Science and Technology

With the explosion of network bandwidth and the ever-changing requirements for diverse network-based applications,the traditional processing architectures,i.e.,general purpose processor（GPP） and application specific integrated circuits（ASIC） cannot provide sufficient flexibility and high performance at the same ***,the network processor（NP） has emerged as an alternative to meet these dual demands for today＇s network *** NP combines embedded multi-threaded cores with a rich memory hierarchy that can adapt to different networking circumstances when customized by the application *** today＇s NP architectures,multithreading prevails over cache mechanism,which has achieved great success in GPP to hide memory access *** paper focuses on the efficiency of the cache mechanism in an *** timing models of packet processing are established for evaluating cache efficiency and experiments are performed based on real-life network backbone *** results show that an improvement of nearly 70% can be gained in throughput with assistance from the cache ***,the cache mechanism is still efficient and irreplaceable in network processing,despite the existing of multithreading.

关键词： cache network processor efficiency evaluation

Architecture-Aware Session Lookup Design for Inline Deep Inspection on network processors

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Tsinghua Science and Technology 2009年第1期14卷 19-28页

作者：徐波何飞薛一波李军 Department of Automation Tsinghua University Research Institute of Information Technology (RIIT) Tsinghua University Tsinghua National Laboratory for Information Science and Technology (TNList)

Today＇s firewalls and security gateways are required to not only block unauthorized accesses by authenticating packet headers, but also inspect flow payloads against malicious intrusions. Deep inspection emerges as a seamless integration of packet classification for access control and pattern matching for intrusion prevention. The two function blocks are linked together via well-designed session lookup schemes. This paper presents an architecture-aware session lookup scheme for deep inspection on network processors （NPs）. Test results show that the proposed session data structure and integration approach can achieve the OC-48 line rate （2.5 Gbps） with inline stateful content inspection on the Intel IXP2850 NP. This work provides an insight into application design and implementation on NPs and principles for performance tuning of NP-based programming such as data allocation, task partitioning, latency hiding, and thread synchronization.

关键词： session lookup deep inspection network processor performance optimization

Building RNC in All-IP Wireless networks using network processors

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The Journal of China Universities of Posts and Telecommunications 2004年第2期11卷 86-91页

作者： CHENGSheng NIXian-le ZHUXin-ning DINGWei BeijingUniversityofPostsandTelecommunications Beijing100876P.R.China

This paper describes a solution to build network-processor-based Radio network Controller (RNC) in all-IP wireless networks, it includes the structure of the 3rd Generation (3G) wireless networks and the role of network nodes, such as Base Station (BS), RNC, and Packet-Switched Core networks (PSCN). The architecture of IXP2800 network processor; the detailed implementation of the solution on IXP2800-based RNC are also covered. This solution can provide scalable IP forward features and it will be widely used in 3G RNCs.

关键词： G 3GPP All-IP wireless networks RNC IP network processor IXP2800

Implementation of 10Gigabit Packet Switching Using IXP network processors

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Implementation of 10Gigabit Packet Switching Using IXP Netwo...

A High-Speed Information Retrieval System

2003 International Conference on Communication Technology

作者： Cheng Sheng Zhang Xu Cao Yingxin Ding Wei Broadband Communication networks Lab. Beijing University of Posts and Telecommunications Beijing P.R.China

Rapidly increased network services need high- performance, flexible networking devices. network processors are being targeted at a wide range of applications with varying packet processing and high-th

关键词： network processor IXP IXP2800 RISC ARM Microengine Switching Ethernet IP

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Wuhan University Journal of Natural Sciences 2004年第4期9卷 425-428页

作者： SHIShu-dong LIZhi-tang SchoolofComputerScienceandTechnology HuazhongUniversityofScienceandTechnologyWuhan430074HuheiChina SchoolofComputerScienceandTechnology HuazhongUniversityofScienceandTechnologyWuhan430074HuheiChina

We cleveloped a high-speed information retrieval system. The system hased on the IXP 2800 is one of the dedicute device. The velocity of the information retrieval is 6.8 Gb/s. The protocol support Telnet, FTP, SMTP, POP3 etc. various networks protocols. The information retrieval supports the key word and the natural language process. This paper explains the hardware system, software system and the index of the performance. Key words network processor - IXP2800 - information retrieval - IXA CLC number TP 309 Foundation item: Supported by the National Natural Science Foundation of China (69873016 & 69972017) and the National High Technology Development Program of China (863-301-06-1)Biography: SHI Shu-dong (1963-), male, Ph. D. candidate, research direction: network & information security.

关键词： network processor IXP2800 information retrieval IXA

The Application of NPs in WCDMA Systems

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Journal of Electronic Science and Technology of China 2007年第2期5卷 107-110页

作者： Jian-Ming Liao Ping-Fang Liao School of Computer Science and Engineering University of Electronic Science and Technology of China （UESTS） Chengdu 610054 China

Recent efforts to add new services to the wide-band code division multiple accesses （WCDMA） system have increased interest in network processor （NP）-based routers that are easy to extend and evolve. In this paper, an application of NPs in routing engine module （REM） of radio network controller （RNC） in WCDMA system is proposed. The measuring results show that NPs have good performance and efficiency in routing traffic of the communication network and the simulation verifies the fast forwarding function of NPs.

关键词： network processor wide-band code division multiple access Asynchronous Transfer Mode,radio network controller.

A New Scheme of Integrating NAS with SAN

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Journal of Shanghai Jiaotong university(Science) 2003年第1期8卷 6-9页

作者：王志恒白英彩 Dept.of Computer Science&Eng. ShanghaiJiaotongUniv.

This paper reviewed two types of network storage technique: NAS and SAN. After comparing and analyzing, it concluded that the ultimate realization of network storage will be in the eventual convergence of NAS and SAN architectures. Currently, all the integration methods are based on the architecture level. This paper presented a device level integration scheme based on IXP1200 network processor. The device can be used as an NAS file server or an SAN’s storage node. Furthermore, it can be used as a bridge to connect NAS and SAN, and then be shared by their clients.

关键词： network attached storage (NAS) storage area network (SAN) network processor

A Fast Packet Classification Algorithm Based on Classifier’s Characteristic Applying to Multi-fields

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A Fast Packet Classification Algorithm Based on Classifier’...

2003 International Conference on Communication Technology

作者： Liqin Tian Chuang Lin Zhangxi Tan Department of Computer Science and Technology Tsinghua University

Performing classification quickly on multi- fields is known to be difficult, and has poor worst-case performance. In this paper, we present a solution to the problem of rapidly classifying packets. Ou

关键词： Packet Classification network processor

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面向网络处理器的软件开发平台的研究

面向网络处理器的软件开发平台的研究

作者：董明峰西北工业大学

学位级别：硕士

Nowadays with the development of network transmit technology, Data rates are increasing, Protocols are becoming more dynamic and also being introduced more rapidly. All of this causes the increasing requirement for future network equipment. The combination of high-performance processing power and flexibility in network processors has made them a good solution for today's packet processing needs. It can provide the foundation for a wide range of network *** software problem has prevented network processors from achieving their full potential. It has more than one tool-chains for they have several processors. Programming multi-threaded micro-engines will surely undercuts network processor time-to-market benefit. Different Vendor have different architecture, microcode is unique to a specific NP which definitely negate the flexibility *** main destination of integrated software development platform is to remove hardware dependencies from network applications, reduce product development difficulty and time, optimize the performance of system for programmers and network equipment designers. This paper first introduces the hardware infrastructure and software IXA portable framework of Intel IXP2400 network processor. Then we discuss the design of software platform. We categorized it into two parts: front-end tools and backend tools. In the front-end tools, we provide programmer a GUI environment for their design. We also define a kind of high level descriptor language and some components for them. The back end tools mainly contain code generator and data plane *** scheduling is the key mechanism for Internet QoS guarantee. As part of the software platform, this paper describes the research and implementation of SFQ/DWCS and URR scheduling algorithm component based on network processors. We use some special way according to NP characteristic to achieve efficiency which is a good reference for development on all the NP platforms. This paper also

关键词： network processor Micro-engine Software Platform Compiler Link Scheduler