检索结果-南通市图书馆

2011 Chinese Control and Decision Conference（CCDC）

作者： Zhao xia is with the Department of Control Science and Engineering,School of Electronics and Information Engineering,Tongji University,Shanghai,China 200092.He yabo,was with Huawei Technologies Co.,Ltd.,Shanghai,China.He is now with the Shanghai JunTong Electronic Science and Technology Co.Ltd,Shanghai,200090,China

digital baseband predistorter modeled by a memory polynomial and implemented by an indirect learning architecture is among the most cost effective method for linearizing power *** to high correlation between each element of polynomial,general parameter extraction algorithms,*** decomposition combined with linear least square method,have worse numerical stability when higher order terms are *** polynomials are good substitutes,but finding closed-form expressions for orthogonal polynomials for an arbitrary distribution is generally a difficult problem,and the derivations are not easily *** on modified Gram-Schmidt （MGS） orthogonalization method,the article put forward an easy,novel method to find orthogonal basis for random input signal with distribution function of uniformly distributed between 0 and *** same time,we use QR decomposition not linear least squares to obtain coefficients of *** method guarantees good numerical stability from above two aspects,and can be easily realized in real *** exhibits the effective of the methods.

关键词： Power amplifiers(PAs) digital predistorter Modified Gram-Schmidt orthogonalization QR decomposition

来源： cnki会议评论

在线全文

cnki会议

学校读者我要写书评

暂无评论

Low-cost FPGA implementation of 2D digital pre-distorter for concurrent dual-band power amplifier

引用

The Journal of China Universities of Posts and Telecommunications 2016年第1期23卷 14-21页

作者： Zeng Guang Yu Cuiping Li Shulan Liu Yuan'an Beijing Key Laboratory of Work Safety Intelligent Monitoring Beijing University of Posts and Telecommunications School of Electronic Engineering Beijing University of Posts and Telecommunications

This paper proposes a low-cost hardware architecture based on concurrent dual-band digital pre-distorter （DPD）. The architecture is implemented on field programmable gate array （FPGA） to compensate for the nonlinearity of the concurrent dual-band power amplifier （PA）. This implementation introduces a novel model complexity reduction technique into system, namely, time-division multiplexing for out-of-band lookup tables （LUTs） sharing. Performances are evaluated with an experimental test setup using a wideband class-F PA. The dual-band signal center frequency separated by 80 MHz. Lower and upper center frequency are located at 2.61 GHz and 2.69 GHz, respectively. This novel DPD implementation maintains excellent performance, but uses hardware resources reduced by 29.17% compared with conventional approaches. The results show that the adjacent channel power ratio （ACPR） is less than -59 dBc and normalized mean square error （NMSE） is around - 62dB for lower sideband （LSB） and - 63dB for upper sideband （USB）.

关键词： power amplifier concurrent dual-band digital predistorter lookup table field programmable gate array (FPGA)

来源：

维普期刊数据库

同方期刊数据库评论

在线全文

学校读者我要写书评

暂无评论

欢迎您,

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

在线全文

在线全文

请选择保存的检索档案：

请选择收藏分类：

通借通还

欢迎您,

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

在线全文

在线全文

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：