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A new algorithm based on c-v characteristics to extract the epitaxy layer parameters for power devices with the consideration of termination

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chinese Physics B 2021年第4期30卷 616-628页

作者：吴九鹏任娜盛况 college of Electrical Engineering Zhejiang UniversityHangzhou 310027China Hangzhou Innovation center Zhejiang UniversityHangzhou 311200China

Doping concentration and thickness of an epitaxy layer are the most essential parameters for power devices.The conventional algorithm extracts these two parameters by calculating the doping profile from its capacitance-voltage(c-v)characteristics.Such an algorithm treats the device as a parallel-plane junction and ignores the influence of the terminations.The epitaxy layer doping concentration tends to be overestimated and the thickness underestimated.In order to obtain the epitaxy layer parameters with higher accuracy,a new algorithm applicable for devices with field limited ring(FLR)terminations is proposed in this paper.This new algorithm is also based on the c-v characteristics and considers the extension manner of the depletion region under the FLR termination.Such an extension manner depends on the design parameters of the FLR termination and is studied in detail by simulation and modeling.The analytical expressions of the device c-v characteristics and the effective doping profile are derived.More accurate epitaxy layer parameters can be extracted by fitting the effective doping profile expression to the c-v doping profile calculated from the c-v characteristics.The relationship between the horizontal extension width and the vertical depth of the depletion region is also acquired.The credibility of the new algorithm is verified by experiments.The applicability of our new algorithm to FLR/field plate combining terminations is also discussed.Our new algorithm acts as a powerful tool for analyses and improvements of power devices.

关键词： c-v characteristics doping concentration epitaxy layer thickness field limited ring termination

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Performance analysis of 20 nm gate-length In_(0:2)Al_(0:8)N/GaN HEMT with cu-gate having a remarkable high I_(ON)/I_(OFF)ratio

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Journal of Semiconductors 2014年第6期35卷 26-31页

作者： A.Bhattacharjee T.R.Lenka Department of Electronics and communication Engineering National Institute of Technology Silchar

We propose a new structure of InxAll-xN/GaN high electron mobility transistor （HEMT） with gate length of 20 nm. The threshold voltage of this HEMT is achieved as -0.472 v. In this device the InA1N barrier layer is intentionally n-doped to boost the ION/IOFF ratio. The InAlN layer acts as donor barrier layer for this HEMT which exhibits an ION = 10-4.3 A and a very low IOFF = 10-14.4 A resulting in an ION/IoFF ratio of 1010.1. We compared our obtained results with the conventional InAlN/GaN HEMT device having undoped barrier and found that the proposed device has almost l0s times better ION/IOFF ratio. Further, the mobility analysis in GaN channel of this proposed HEMT structure along with Dc analysis, c-v and conductance characteristics by using small-signal analysis are also presented in this paper. Moreover, the shifts in threshold voltage by DIBL effect and gate leakage current in the proposed HEMT are also discussed. InAlN was chosen as the most preferred barrier layer as a replacement of AlGaN for its excellent thermal conductivity and very good scalability.

关键词： c-v characteristics DIBL GaN HEMT ION/IOFF mobility

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The electrical characteristics of a 4H-silicon carbide metal-insulator-semiconductor structure with Al_2O_3 as the gate dielectric

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chinese Physics B 2011年第12期20卷 366-372页

作者：刘莉杨银堂马晓华 School of Microelectronics Xidian University Key Laboratory of Wide Band Gap Semiconductor Materials and Devices of Ministry of Education School of Technical Physics Xidian University

A 4H-silicon carbide metal-insulator-semiconductor structure with ultra-thin Al2O3 as the gate dielectric, deposited by atomic layer deposition on tile epitaxial layer of a 4H-Sic （0001） 80N-/N＋ substrate, has been fabricated. The experimental results indicate that the prepared ultra-thin Al2O3 gate dielectric exhibits good physical and electrical characteristics, including a high breakdown electrical field of 25 Mv/cm, excellent interface properties （1 × 10^14 cm^-2） and low gate-leakage current （IG = 1 × 10^-3 A/cm 2@Eox = 8 Mv/cm）. Analysis of the current conduction mecha- nism on the deposited Al2O3 gate dielectric was also systematically performed. The confirmed conduction mechanisms consisted of Fowler-Nordheim （FN） tuaneling, the Frenkel-Poole mechanism, direct tunneling and Schottky emission, and the dominant current conduction mechanism depends on the applied electrical field. When the gate leakage current mechanism is dominated by FN tunneling, the barrier height of Sic/Al2O3 is 1.4 ev, which can meet the requirements of silicon carbide metal-insulator-semiconductor transistor devices.

关键词： Al2O3 4H-silicon carbide metal-insulator-semiconductor capacitor gate leakage current c-v characteristics

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Effect of post oxidation annealing in nitric oxide on interface properties of 4H-Sic/SiO_2 after high temperature oxidation

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Journal of Semiconductors 2015年第9期36卷 58-61页

作者：李妍月邓小川刘云峰赵艳黎李诚瞻陈茜茜张波 State Key Laboratory of Electronic Thin Films and Integrated Devices University of Electronic Science and Technology of China Institute of Optics and Electronics Chinese Academy of Sciences Power Electronics Business Unit Zhuzhou CSR Times Electric Co.Ltd.

The interface properties of 4H-Sic metal oxide semiconductor （MOS） capacitors with post-oxidation annealing （POA） in nitric oxide （NO） ambient after high temperature （1300 ℃） oxidation have been investigated using capacitance-voltage （c v） measurements. The experimental results show that the interface states density （Dit） can be obviously decreased by the POA in NO ambient （NO-POA） and further reduced with increasing POA temperature and time. In the meantime significant reduction of the interface states density and oxidation time can be achieved at the higher thermal oxidation temperature, which results in the better oxide MOS characteristics and lower production costs. The dependence of Dit on POA temperature and time has been also discussed in detail.

关键词： c-v characteristics 4H-Sic MOS post-oxidation annealing Sic/SiO2

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charge storage characteristics of Ni nanocrystals formed by synchronous crystallization

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Journal of Semiconductors 2014年第10期35卷 17-22页

作者：程佩红黄仕华陆昉 Physics Department Zhejiang Normal University Surface Physics National Key Laboratory Fudan University

The rapid thermal annealing （RTA） nano-crystallization method is widely used in the metal nanocrystal fabrication process. However, the high temperature （usually 600 900 ℃） in the RTA process will worsen the per- formance and reliability of devices. A novel method has been proposed to grow metal nanocrystal by synchronous in situ nano-crystallization of metal thin film （SINc）, which is able to resolve the problems mentioned above. com- pared with Ni nanocrystals （Ncs） formed by RTA, Ni Ncs prepared by SINc can obtain more energy to crystallize, and its crystallization temperature is greatly reduced. A large memory window （2.78 v） was observed for Ni Ncs deposited by SINc at 300 ℃. However, the largest window is only 1.26 v for Ni Ncs formed by RTA at 600 ℃. A large change （from 0.20 to 4.59 v） of the memory window was observed while the operation voltage increased from 0 to 4-10 v, which is due to an occurrence of strong carrier trapping in Ni Ncs. Flat-band voltage shift rapidly increases to its saturation value, which indicates that electron/hole trapping in Ni Ncs mainly occurs at the initial stage of the program/erase process. A theoretical model was proposed to characterize the charging and discharging processes.

关键词： metal nanocrystal memory synchronously crystallization c-v characteristics

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Theoretical investigation of incomplete ionization of dopants in uniform and ion-implanted 4H-Sic MESFETs

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chinese Physics B 2003年第1期12卷 89-93页

作者： Wang Shou-Guo(王守国) Zhang Yi-Men(张义门) Zhang Yu-Ming(张玉明) Institute of Microelectronics Xidian University Xi'an 710071 China Department of Electronic Science Northwest University Xi'an 710069 China Institute of Microelectronics Xidian University Xi'an 710071 China

The effects of incomplete ionization ofnitrogen in 4H-Sic have been investigated. Poisson's equation is numerically analysed by considering the effects of Poole-Frenkel, and the effects of the potential on Nd+ (the concentration of ionized donors) and n (the concentration of electrons). The pinch-off voltages of the uniform and the ion-implanted channels of 4H-Sic metal-semiconductor field-effect transistors (MESFETs) and the capacitance of the gate are given at different temperatures. Both the Poole-Frenkel effect and the potential have influence on the pinch-off voltage vP of 4H-Sic MESFETs. Although the c-v characteristics of the ion-implanted and the uniform channel of 4H-Sic MESFETs have a clear distinction, the effects of incomplete ionization on the c-v characteristics are not significant.

关键词： silicon carbide ion implantation pinch-off voltage c-v characteristics

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The charge storage of the nc—Si layer

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chinese Physics B 2002年第9期11卷 944-947页

作者：戴敏张林等 StateKeyLaboratoryofSolidStateMicrostructuresandDepartmentofPhysics NanjingUniversityNanjing210093China StateKeyLaboratoryofSolidStateMicrostructuresandDepartmentofPhysics NanjingUniversityNanjing2

Sandwiched structures (a-SiNx/a-Si/a-SiNx) have been fabricated by the plasma enhanced chemical vapour deposi-tion technique. A Si nanocrystal (nc-Si) layer was formed by crystallization of an a-Si layer according to the constrainedcrystallization principle after quasi-static thermal annealing at 1100℃ for 30min. Transmission electron microscopy(TEM) and Raman scattering spectroscopy clearly demonstrated that nc-Si grains were formed in the as-deoositeda-Si layer after annealing. The density of nc-Si grains is about 1011cm-2 as shown by TEM photograplasx Usingcapacitance-voltage (c-v) measurements we investigated the electrical characteristics of the sandwiched structures.The charge storage phenomenon of the nc-Si layer was observed from the shift of flat-band voltage (vFB) in c-v curvesat a high frequency (1 MHz). We estimated the density of nc-Si grains to be about 1011cm-2 from the shift value ofvFB, which is in agreement with the result of TEM photographs. At the same time, we found that the shift of vFBincreased with the increase of the applied constant dc voltage or the thickness of the nc-Si layer.

关键词： nc-Si thermal annealing c-v characteristics charge storage

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Percolation effects in the capacitive properties of metal-oxide varistors in the range of high voltage

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Journal of Advanced Dielectrics 2014年第2期4卷 46-50页

作者： A.S.Tonkoshkur I.v.Gomilko A.Yu Lyashkov Department of Physics Electronics and Computer SystemsDniepropetrovsk National UniversityGagarin av.72Dniepropetrovsk49010Ukraine

c-v characteristics of ZnO-based ceramic structures used in manufacturing high-voltage and low-voltage varistors of different chemical compositions and manufacturing techniques have been investigated.A correlation between the intensity of electric field corresponding to transition of the c-v characteristics to the negative capacitances and average sizes of grains of a varistor structure has been established.Obtained data have been interpreted with the use of notions of the percolation theory of electric conductivity.The Shklovskii-De Gennes model has been used.It has been shown that on the highly nonlinear segment of c-v characteristics of a varistor structure,the size of an infinite cluster are limited to several intercrystallite potential barriers.This result is observed in all kinds of investigated varistor ceramics.

关键词： varistor ceramics c-v characteristics capacitance percolation

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