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A Reconfigurable Block Cryptographic Processor Based on VLIW Architecture

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China Communications 2016年第1期13卷 91-99页

作者： LI Wei zeng xiaoyang NAN Longmei CHEN Tao DAI Zibin State Key Lab of ASIC and System Fudan University Shanghai 200240 China Institute of Information Science and Technology Zhengzhou 450001 China

An Efficient and flexible implementation of block ciphers is critical to achieve information security *** implementation methods such as GPP,FPGA and cryptographic application-specific ASIC provide the broad range of ***,these methods could not achieve a good tradeoff between high-speed processing and *** this paper,we present a reconfigurable VLIW processor architecture targeted at block cipher processing,analyze basic operations and storage characteristics,and propose the multi-cluster register-file structure for block *** for the same operation element of block ciphers,we adopt reconfigurable technology for multiple cryptographic processing units and interconnection *** proposed processor not only flexibly accomplishes the combination of multiple basic cryptographic operations,but also realizes dynamic configuration for cryptographic processing *** has been implemented with0.18μm CMOS technology,the test results show that the frequency can reach 350 *** power consumption is 420 *** kinds of block and hash ciphers were realized in the *** encryption throughput of AES,DES,IDEA,and SHA-1 algorithm is1554 Mbps,448Mbps,785 Mbps,and 424 Mbps respectively,the test result shows that our processor's encryption performance is significantly higher than other designs.

关键词： Block Cipher VLIW processor reconfigurable application-specific instruction-set

A High Energy-Efficient Reconfigurable VLIW Symmetric Cryptographic Processor with Loop Buffer Structure and Chain Processing Mechanism

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Chinese Journal of Electronics 2017年第6期26卷 1161-1167页

作者： LI Wei zeng xiaoyang DAI Zibin NAN Longmei CHEN Tao MA Chao State Key Lab of ASIC and System Fudan University Institute of Information Science and Technology Zhengzhou

By exploring symmetric cryptographic data level and instruction-level parallelism, the reconfigurable processor architecture for symmetric ciphers is presented based on Very-long instruction word(VLIW) structure. The application-specific instruction-set system for symmetric ciphers is proposed. As for the same arithmetic operation of symmetric ciphers, eleven kinds of reconfigurable cryptographic arithmetic units are designed by the reconfigurable technology. As to the requirement of high energy-efficient design, the loop buffer structure for instruction fetching unit is proposed to reduce the power consumption significantly with the same frequency as conventional, meanwhile, the chain processing mechanism is proposed to improve the cryptographic throughput without any area overhead. It has been fabricated with 0.18μm CMOS technology. The result shows that the processor can work up to 200 MHz, and the fourteen kinds of cryptographic algorithms were mapped in the processor, the encryption throughput of AES, SNOW2.0 and SHA2 algorithm can achieve 1.19 Gbps, 1.05 Gbps, and 407 Mbps respectively.

关键词： Symmetric cipher Energy-efficient VLIW processor Loop buffer structure Chain processing mechanism Reconfigurable

The energy-efficient implementation of an adaptive-filtering-based QRS complex detection method for wearable devices

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Journal of Semiconductors 2017年第10期38卷 15-21页

作者： Shudong Tian Jun Han Jianwei Yang xiaoyang zeng State Key Laboratory of ASIC and System Fudan University

Electrocardiogram（ECG） can be used as a valid way for diagnosing heart *** fulfill ECG processing in wearable devices by reducing computation complexity and hardware cost,two kinds of adaptive filters are designed to perform QRS complex detection and motion artifacts removal,*** proposed design achieves a sensitivity of 99.49% and a positive predictivity of 99.72%,tested under the MIT-BIH ECG *** proposed design is synthesized under the SMIC 65-nm CMOS technology and verified by post-synthesis *** results show that the power consumption and area cost of this design are of 160 μW and 1.09×10^5 μm^2,respectively.

关键词： ECG adaptive filter QRS motion artifacts R wave detection

FSS: algorithm and neural network accelerator for style transfer

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Science China(Information Sciences) 2024年第2期67卷 253-266页

作者： Yi LING Yujie HUANG Yujie CAI Zhaojie LI Mingyu WANG Wenhong LI xiaoyang zeng State Key Laboratory of ASIC & System Fudan University Shanghai Explore X Technology Co. Ltd.

Neural networks(NNs), owing to their impressive performance, have gradually begun to dominate multimedia processing. For resource-constrained and energy-sensitive mobile devices, an efficient NN accelerator is necessary. Style transfer is an important multimedia application. However, existing arbitrary style transfer networks are complex and not well supported by current NN accelerators, limiting their application on mobile devices. Moreover, the quality of style transfer needs improvement. Thus, we design the Fast Style system(FSS), where a novel algorithm and an NN accelerator are proposed for style transfer. In FSS, we first propose a novel arbitrary style transfer algorithm, Fast Style. We propose a light network that contributes to high quality and low computational complexity and a prior mechanism to avoid retraining when the style changes. Then, we redesign an NN accelerator for Fast Style by applying two improvements to the basic NVIDIA deep learning accelerator(NVDLA) architecture. First, a flexible dat FSM and wt FSM are redesigned to enable the original data path to perform other operations(including the GRAM operation)by software programming. Moreover, statistics and judgment logic are designed to utilize the continuity of a video stream and remove the data dependency in the instance normalization, which improves the accelerator performance by 18.6%. The experimental results demonstrate that the proposed Fast Style can achieve higher quality with a lower computational cost, making it more suitable for mobile devices. The proposed NN accelerator is implemented on the Xilinx VCU118 FPGA under a 180-MHz clock. Experimental results show that the accelerator can stylize 512×512-pixel video with 20 FPS, and the measured performance reaches up to 306.07 GOPS. The ASIC implementation in TSMC 28 nm achieves about 22 FPS in the case of a 720-p video.

关键词： neural network accelerator style transfer neural network deep learning

A VLIW Architecture Stream Cryptographic Processor for Information Security

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China Communications 2019年第6期16卷 185-199页

作者： Longmei Nan Xuan Yang xiaoyang zeng Wei Li Yiran Du Zibin Dai Lin Chen ASIC&System State Key Laboratory of Fudan University Shanghai 201203China Institute of Information Science and Technology Zhengzhou 450001China Jiangnan Institute of Computing Technology WuXi 214083China

As an important branch of information security algorithms,the efficient and flexible implementation of stream ciphers is *** implementation methods,such as FPGA,GPP and ASIC,provide a good support,but they could not achieve a better tradeoff between high speed processing and high *** has fast processing speed,but its flexibility is poor,GPP has high flexibility,but the processing speed is slow,FPGA has high flexibility and processing speed,but the resource utilization is very *** paper studies a stream cryptographic processor which can efficiently and flexibly implement a variety of stream cipher *** analyzing the structure model,processing characteristics and storage characteristics of stream ciphers,a reconfigurable stream cryptographic processor with special instructions based on VLIW is presented,which has separate/cluster storage structure and is oriented to stream cipher *** proposed instruction structure can effectively support stream cipher processing with multiple data bit widths,parallelism among stream cipher processing with different data bit widths,and parallelism among branch control and stream cipher processing with high instruction level parallelism;the designed separate/clustered special bit registers and general register heaps,key register heaps can satisfy cryptographic *** the proposed processor not only flexibly accomplishes the combination of multiple basic stream cipher operations to finish stream cipher *** has been implemented with 0.18μm CMOS technology,the test results show that the frequency can reach 200 MHz,and power consumption is 310 *** kinds of stream ciphers were realized in the *** key stream generation throughput of Grain-80,W7,MICKEY,ACHTERBAHN and Shrink algorithm is 100 Mbps,66.67 Mbps,66.67 Mbps,50 Mbps and 800 Mbps,*** test result shows that the processor presented can achieve good tradeoff between high performance and flexibili

关键词： stream cipher VLIW architecture processor reconfigurable application-specific instruction-set

Performance analysis of wireless local area networks(WLAN) in a coal-mine tunnel environment

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Mining Science and Technology 2010年第4期20卷 629-634页

作者： ZHU Changping DENG Xingsong ZHU Jia LI Lei zeng xiaoyang YU Hongzhen ZHANG Shen School of Information and Electrical Engineering China University of Mining & Technology Xuzhou 221008 China Department of Computer and Information Engineering Hohai University Changzhou 213022 China China Shipbuilding Industry Corporation No. 723 Research Institute Yangzhou 225000 China College ofTelecomm & Information Engineering Nanjing University of Posts & Telecommunication Nanjing 210003 China School of Automation Nanjing University of Science and Technology Nanjing 210094 China

In order to establish an effective wireless communication system in an underground coal-mine environment, the propagation of radio waves through a rectangular-like mine tunnel was investigated by jointly, considering both the dielectric constant and the reflectance of a mine tunnel. By combining free space and modified waveguide propagation models, we propose a new hybrid propagation model based on ray tracing. Simulation results have shown the effectiveness of establishing a wireless Local Area Network (LAN) in this coal-mine environment. The results of this research will be very useful as a guide in the design and development of tunnel wireless LAN systems.

关键词： mine tunnel hybrid propagation model wireless LAN

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TN-LCD的数字信号驱动方法

固体电子学研究与进展 2008年第2期28卷 264-270页

作者：包旭鹤曾晓洋复旦大学专用集成电路与系统国家重点实验室上海200433

提出了用数字信号取代多电平信号驱动TN-LCD的方法,利用数字信号相位差和占空比的不同,实现行(COMMON)和列(SEGMENT)信号电压差均方根值差异而达到显示图形的效果。文中首先构造了数字单行扫描模式,但其对显示对比度影响较大;进而借鉴... 详细信息

提出了用数字信号取代多电平信号驱动TN-LCD的方法,利用数字信号相位差和占空比的不同,实现行(COMMON)和列(SEGMENT)信号电压差均方根值差异而达到显示图形的效果。文中首先构造了数字单行扫描模式,但其对显示对比度影响较大;进而借鉴了多路寻址液晶驱动的原理,构造出数字两行扫描模式改善了显示对比度;最后得到的数字两行扫描模式的TN-LCD驱动方法具有无静态功耗、驱动能力强、成本低、实现灵活等优点。低于16行LCD应用条件下其显示对比度已接近传统方法。通过FPGA和流片试验,结果证明此方法是可实现的。实际观察到的显示对比度和静态工作电流已达到预期目标。

关键词：液晶驱动显示扭曲向列阵型多路寻址均方根静态功耗显示对比度

Qinghai-tibetan plateau peatland sustainable utilization under anthropogenic disturbances and climate change

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Ecosystem Health and Sustainability 2017年第3期3卷 28-38页

作者： Gang Yang Changhui Peng Huai Chen Faqin Dong Ning Wu Yanzheng Yang Yao Zhang Dan Zhu Yixin He Shengwei Shi xiaoyang zeng Tingting Xi Qingxiang Meng Qiuan Zhu State Key Laboratory of Soil Erosion and Dryland Farming on the Loess Plateau Northwest A&F UniversityYangling712100 China School of Life Science and Engineering Southwest University of Science and TechnologyMianyang621010 China Department of Biological Sciences Institute of Environmental SciencesUniversity of Quebec at MontrealMontrealQuebec C3H 3P8 Canada CAS Key Laboratory of Mountain Ecological Restoration and Bioresource Utilization&Ecological Restoration Biodiversity Conservation Key Laboratory of Sichuan ProvinceChengdu Institute of BiologyChinese Academy of SciencesChengdu610041 China Zoige Peatland and Global Change Research Station Chengdu Institute of BiologyChinese Academy of SciencesHong yuan624400 China Key Laboratory of Solid Waste Treatment and Resource Recycle Ministry of EducationSouthwest University of Science and TechnologyMianyang621010 China Department of Microbiology and Plant Biology Center for Spatial AnalysisUniversity of OklahomaNormanOklahoma 73019 USA Department of Landscape Architecture Sichuan College of Architectural TechnologyDeyang61800 China College of Economics Heilongjiang Institute of TechnologyHarbinHeilongjiang 150050 China College of Resources and Environmental Science Henan Agricultural UniversityZhengzhouHenan 450002 China

Often referred to as the“Third Pole,”China’s Qinghai-Tibetan Plateau developed large amounts of peatland owing to its unique alpine *** a renewable resource,peat helps to regulate the climate as well as performing other important ***,in recent years,intensifying climate change and anthropogenic disturbances have resulted in peatland degradation and consequently made sustainable development of peatland more *** review summarizes peatland ecological and economic functions,including carbon sequestration,biodiversity conservation,energy supplies,and *** identifies climate change and anthropogenic disturbances as the two key factors attributing to peatland degradation and ecosystem carbon *** problems in environmental degradation and future challenges in peatland management under the effects of global warming are also discussed and highlighted.

关键词： climate change mitigation peatland management renewable resource sustainable development

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试析法国近代两次“教科书战争”

世界历史 2010年第5期 64-72页

作者：曾晓阳中山大学外国语学院副教授广州510275

19世纪末20世纪初,天主教会两度公然将法国公立初等学校使用的部分教科书列为禁书,挑起波及全国的"教科书战争"。这两场战争既彰显了教科书在当时所具有的重要的思想政治宣传功能,又暴露了天主教会欲恢复其在初等教育领域的垄断地位的企... 详细信息

19世纪末20世纪初,天主教会两度公然将法国公立初等学校使用的部分教科书列为禁书,挑起波及全国的"教科书战争"。这两场战争既彰显了教科书在当时所具有的重要的思想政治宣传功能,又暴露了天主教会欲恢复其在初等教育领域的垄断地位的企图,同时也凸显了法兰西共和政府坚持世俗化学校的决心。

关键词：法国教科书初等教育