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A new design of parity-preserving reversible multipliers based on multiple-control toffoli synthesis targeting emerging quantum circuits

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Frontiers of Computer Science 2024年第6期18卷 186908-186908页

作者： NOORALLAHZADEH Mojtaba MOSLEH Mohammad datta kamalika Department of Computer Engineering Dezful Branch Islamic Azad University German Research Centre for Artificial Intelligence (DFKI) Institute of Computer Science University of Bremen

With the recent demonstration of quantum computers, interests in the field of reversible logic synthesis and optimization have taken a different turn. As every quantum operation is inherently reversible, there is an immense motivation for exploring reversible circuit design and optimization. When it comes to faults in circuits, the parity-preserving feature donates to the detection of permanent and temporary faults. In the context of reversible circuits, the parity-preserving property ensures that the input and output parities are equal. In this paper we suggest six parity-preserving reversible blocks (ZFATSL) with improved quantum cost. The reversible blocks are synthesized using an existing synthesis method that generates a netlist of multiple-control Toffoli (MCT) gates. Various optimization rules are applied at the reversible circuit level, followed by transformation into a netlist of elementary quantum gates from the NCV library. The designs of full-adder and unsigned and signed multipliers are proposed using the functional blocks that possess parity-preserving properties. The proposed designs are compared with state-of-the-art methods and found to be better in terms of cost of realization. Average savings of 25.04%, 20.89%, 21.17%, and 51.03%, and 18.59%, 13.82%, 13.82%, and 27.65% respectively, are observed for 4-bit unsigned and 5-bit signed multipliers in terms of quantum cost, garbage output, constant input, and gate count as compared to recent works.

关键词： reversible circuits parity-preserving NCV library multiple-control Toffoli gates quantum circuits quantum cost

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