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Research on key technologies of edge cache in virtual data space across WAN

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Frontiers of Computer Science 2023年第1期17卷 15-34页

作者： Jiantong HUO Yaowen XU Zhisheng HUO Limin XIAO zhenxue he State Key Laboratory of Software Development Environment Beihang UniversityBeijing 100191China School of Computer Science and Engineering Beihang UniversityBeijing 100191China High Performance Computing Center Beihang UniversityBeijing 100191China College of Software Beihang UniversityBeijing 100191China hebei Key Laboratory of Agricultural Big Data Hebei Agricultural UniversityBaoding 071001China College of Computer Science and Technology Zhejiang UniversityHangZhou 310013China

The authors of this paper have previously proposed the global virtual data space system (GVDS) to aggregate the scattered and autonomous storage resources in China’s national supercomputer grid (National Supercomputing Center in Guangzhou, National Supercomputing Center in Jinan, National Supercomputing Center in Changsha, Shanghai Supercomputing Center, and Computer Network Information Center in Chinese Academy of Sciences) into a storage system that spans the wide area network (WAN), which realizes the unified management of global storage resources in China. At present, the GVDS has been successfully deployed in the China National Grid environment. However, when accessing and sharing remote data in the WAN, the GVDS will cause redundant transmission of data and waste a lot of network bandwidth resources. In this paper, we propose an edge cache system as a supplementary system of the GVDS to improve the performance of upper-level applications accessing and sharing remote data. Specifically, we first designs the architecture of the edge cache system, and then study the key technologies of this architecture: the edge cache index mechanism based on double-layer hashing, the edge cache replacement strategy based on the GDSF algorithm, the request routing based on consistent hashing method, and the cluster member maintenance method based on the SWIM protocol. The experimental results show that the edge cache system has successfully implemented the relevant operation functions (read, write, deletion, modification, etc.) and is compatible with the POSIX interface in terms of function. Further, it can greatly reduce the amount of data transmission and increase the data access bandwidth when the accessed file is located at the edge cache system in terms of performance, i.e., its performance is close to the performance of the network file system in the local area network (LAN).

关键词： virtual data space system wide area network edge cache redundant data transmission

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POA-FPRMs: Power Optimization Approach of Fixed Polarity Reed-Muller Expressions for Incompletely Specified Boolean Functions

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Chinese Journal of Electronics 2019年第6期28卷 1144-1151页

作者： he zhenxue XIAO Limin HUO Zhisheng WANG Chao LIU Jia WANG Xiang School of Information Science and Technology Hebei Agricultural University School of Computer Science and Engineering Beihang University School of Electronic and Information Engineering Beihang University

Fixed polarity Reed-Muller(RM) expression(FPRM) has several practical applications due to its multitude of properties. In order to generate an FPRM with minimum power, based on a genetic algorithm, we propose a Power optimization approach(POA-FPRMs) of Fixed Polarity RM expressions for incompletely specified Boolean functions. Simulation results on MCNC benchmark circuits show that POAFPRMs can effectively reduce power, compared with the traditional polarity optimization approach, where the don’t care terms are neglected.

关键词： Fixed polarity Reed-Muller(RM) expression(FPRM) Genetic algorithm Power optimization Boolean functions

An Effective Power Optimization Approach Based on Whale Optimization Algorithm with Two-Populations and Mutation Strategies

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Chinese Journal of Electronics 2024年第2期33卷 423-435页

作者： Juncai he zhenxue he Jia LIU Yan ZHANG Fan ZHANG Fangfang LIANG Tao WANG Limin XIAO Xiang WANG hebei Agricultural University Beijing Information Science and Technology University School of Computer Science and Engineering Beihang University School of Electronic and Information Engineering Beihang University

Power is an issue that must be considered in the design of logic circuits. Power optimization is a combinatorial optimization problem, since it is necessary to search for a logical expression that consumes the least amount of power from a large number of Reed-Muller(RM) logical expressions. The existing approach for optimizing the power of multi-output mixed polarity RM(MPRM) logic circuits suffer from poor optimization results. To solve this problem, a whale optimization algorithm with two-populations strategy and mutation strategy(TMWOA) is proposed in this paper. The two-populations strategy speeds up the convergence of the algorithm by exchanging information about the two-populations. The mutation strategy enhances the ability of the algorithm to jump out of the local optimal solutions by using the information of the current optimal solution. Based on the TMWOA, we propose a multi-output MPRM logic circuits power optimization approach(TMMPOA). Experiments based on the benchmark circuits of the Microelectronics Center of North Carolina(MCNC) validate the effectiveness and superiority of the proposed TMMPOA.

关键词： Logic circuits Benchmark testing Search problems Whale optimization algorithms Microelectronics Optimization Convergence

An Efficient and Fast Area Optimization Approach for Mixed Polarity Reed-Muller Logic Circuits

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Chinese Journal of Electronics 2024年第5期33卷 1165-1180页

作者： Yuhao ZHOU zhenxue he Jianhui JIANG Xiaojun ZHAO Fan ZHANG Limin XIAO Xiang WANG School of Software Engineering Tongji University Key Laboratory of Agricultural Big Data of hebei Province Hebei Agricultural University School of Computer Science and Engineering Beihang University School of Electronic and Information Engineering Beihang University

Area has become one of the main bottlenecks restricting the development of integrated circuits. The area optimization approaches of existing XNOR/OR-based mixed polarity Reed-Muller(MPRM) circuits have poor optimization effect and efficiency. Given that the area optimization of MPRM logic circuits is a combinatorial optimization problem, we propose a whole annealing adaptive bacterial foraging algorithm(WAA-BFA), which includes individual evolution based on Markov chain and Metropolis acceptance criteria, and individual mutation based on adaptive probability. To address the issue of low conversion efficiency in existing polarity conversion approaches, we introduce a fast polarity conversion algorithm(FPCA). Moreover, we present an MPRM circuits area optimization approach that uses the FPCA and WAA-BFA to search for the best polarity corresponding to the minimum circuits area. Experimental results demonstrate that the proposed MPRM circuits area optimization approach is effective and can be used as a promising EDA tool.

关键词： Integrated circuits Microorganisms Annealing Logic circuits Circuits Benchmark testing Delays

An efficient and fast polarity optimization approach for mixed polarity Reed-Muller logic circuits

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Frontiers of Computer Science 2017年第4期11卷 728-742页

作者： zhenxue he Limin XIAO Fei GU Tongsheng XIA Shubin SU Zhisheng HUO Rong ZHANG Longbing ZHANG Li RUAN Xiang WANG State Key Laboratory of Software Development Environment Beihang University Beijing 100191 China School of Computer Science and Engineering Beihang University Beijing 100191 China School of Electronic and Information Engineering Beihang University Beijing 100191 China State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China National Engineering Research Center for Science & Technology Resources Sharing Service Beijing 100191 China

Although the genetic algorithm has been widely used in the polarity optimization of mixed polarity Reed- Muller （MPRM） logic circuits, few studies have taken into account the polarity conversion sequence. In order to im- prove the efficiency of polarity optimization of MPRM logic circuits, we propose an efficient and fast polarity optimiza- tion approach （FPOA） considering the polarity conversion se- quence. The main idea behind the FPOA is that, firstly, the best polarity conversion sequence of the polarity set wait- ing for evaluation is obtained by using the proposed hybrid genetic algorithm （HGA）; secondly, each of polarity in the polarity set is converted according to the best polarity con- version sequence obtained by HGA. Our proposed FPOA is implemented in C and a comparative analysis has been pre- sented for MCNC benchmark circuits. The experimental re- suits show that for the circuits with more variables, the FPOA is highly effective in improving the efficiency of polarity op- timization of MPRM logic circuits compared with the tradi- tional polarity optimization approach which neglects the po- larity conversion sequence and the improved polarity opti- mization approach with heuristic technique.

关键词： genetic algorithm polarity optimization mixed

EDOA: an efficient delay optimization approach for mixed-polarity Reed-Muller logic circuits under the unit delay model

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Frontiers of Computer Science 2019年第5期13卷 1102-1115页

作者： zhenxue he Limin XIAO Fei GU Li RUAN Zhisheng HUO Mingzhe LI Mingfa ZHU Longbing ZHANG Rui LIU Xiang WANG College of Information Science and Technology Hebei Agricultural University Baoding 071001 China State Key Laboratory of Software Development Environment Beihang University Beijing 100083 China School of Computer Science and Engineering Beihang University Beijing 100083 China School of Electronic and Information Engineering Beihang University Beijing 100083 China State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China National Engineering Research Center for Science & Technology Resources Sharing Service Beijing 100083 China

Delay optimization has recently attracted signif-icant attention. However, few studies have focused on the delay optimization of mixed-polarity Reed-Muller (MPRM) logic circuits. In this paper, we propose an efficient delay op-timization approach (EDOA) for MPRM logic circuits under the unit delay model, which can derive an optimal MPRM logic circuit with minimum delay. First, the simplest MPRM expression with the fewest number of product terms is ob-tained using a novel Reed-Muller expression simplification approach (RMESA) considering don't-care terms. Second, a minimum delay decomposition approach based on a Huffman tree construction algorithm is utilized on the simplest MPRM expression. Experimental results on MCNC benchmark cir-cuits demonstrate that compared to the Berkeley SIS 1.2 and ABC, the EDOA can significantly reduce delay for most cir-cuits. Furthermore, for a few circuits, while reducing delay, the EDOA incurs an area penalty.

关键词： delay optimization mixed-polarity Reed-Muller logic circuits unit delay model don't-care terms,

Research on performance optimization of virtual data space across WAN

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Frontiers of Computer Science 2024年第6期18卷 186505-186505页

作者： HUO Jiantong HUO Zhisheng XIAO Limin he zhenxue State Key Laboratory of Software Development Environment Beihang University School of Computer Science and Engineering Beihang University High Performance Computing Center Beihang University hebei Key Laboratory of Agricultural Big Data hebei Agricultural University

For the high-performance computing in a WAN environment, the geographical locations of national supercomputing centers are scattered and the network topology is complex, so it is difficult to form a unified view of resources. To aggregate the widely dispersed storage resources of national supercomputing centers in China, we have previously proposed a global virtual data space named GVDS in the project of “High Performance Computing Virtual Data Space”, a part of the National Key Research and Development Program of China. The GVDS enables large-scale applications of the high-performance computing to run efficiently across WAN. However, the applications running on the GVDS are often data-intensive, requiring large amounts of data from multiple supercomputing centers across WANs. In this regard, the GVDS suffers from performance bottlenecks in data migration and access across WANs. To solve the above-mentioned problem, this paper proposes a performance optimization framework of GVDS including the multitask-oriented data migration method and the request access-aware IO proxy resource allocation strategy. In a WAN environment, the framework proposed in this paper can make an efficient migration decision based on the amount of migrated data and the number of multiple data sources, guaranteeing lower average migration latency when multiple data migration tasks are running in parallel. In addition, it can ensure that the thread resource of the IO proxy node is fairly allocated among different types of requests (the IO proxy is a module of GVDS), so as to improve the application’s performance across WANs. The experimental results show that the framework can effectively reduce the average data access delay of GVDS while improving the performance of the application greatly.

关键词： storage aggregation across WANs large-scale applications GVDS data migration allocation of IO proxy resource

基于改进注意力机制和多语义特征增强的自然环境下枣品种识别方法

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农业机械学报 2024年第7期55卷 270-279,324页

作者：雷浩苑迎春许楠何振学河北农业大学信息科学与技术学院保定071001

针对目前自然环境下枣品种识别准确率较低的问题,提出了一种基于注意力机制和多语义特征增强的枣品种识别模型(ICBAM_MSFE_Res50)。该模型在ResNet-50基础上,引入改进注意力机制(Improved convolutional block attention module,ICBAM),... 详细信息

针对目前自然环境下枣品种识别准确率较低的问题,提出了一种基于注意力机制和多语义特征增强的枣品种识别模型(ICBAM_MSFE_Res50)。该模型在ResNet-50基础上,引入改进注意力机制(Improved convolutional block attention module,ICBAM),ICBAM采用一维卷积和多尺度空洞卷积对卷积块注意力模块(CBAM)进行改进,消除了特征图降维时的信息损失,降低了模型计算量和参数量,提高了模型对枣果区域细粒度特征的提取能力。同时,提出了多语义特征增强(Multi semantic feature enhancement,MSFE)模块,该模块通过枣果区域定位算法提取更多枣果局部显著特征,并采用显著性特征抑制算法迫使模型学习枣果次要特征,从而达到枣果多种语义特征学习。实验结果表明,在20类枣品种数据集上,本文模型准确率为92.20%,与ResNet-50相比,提高4.26个百分点。对比AlexNet、VGG-16、ResNet-18、InceptionV3模型,准确率分别提高15.84、9.22、6.86、3.55个百分点。对比其他枣品种识别方法,本文方法在20种枣品种识别中表现最优,可为自然环境下枣品种识别研究提供参考。

关键词：枣品种识别深度学习注意力机制多语义特征增强

基于改进YOLOv8s的果实与叶片器官分割方法

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农业工程学报 2024年第15期40卷 119-126页

作者：许楠苑迎春耿俊何振学河北农业大学信息科学与技术学院保定 071001

为解决多器官特征识别存在的多器官数据集难以获取以及待处理数据集存在的密集小目标和多尺度目标等问题,该研究提出了一种基于改进YOLOv8s的果实与叶片器官分割方法。该方法以YOLOv8s为基础,在Backbone部分设计了跨阶段局部残差(residu... 详细信息

为解决多器官特征识别存在的多器官数据集难以获取以及待处理数据集存在的密集小目标和多尺度目标等问题,该研究提出了一种基于改进YOLOv8s的果实与叶片器官分割方法。该方法以YOLOv8s为基础,在Backbone部分设计了跨阶段局部残差(residual CSPLayer 2Conv,RC2)模块,以拓宽每个网络层的感受野,使网络能充分提取密集的小目标特征。在Neck部分设计了尺度空间金字塔池化(scale spatial pyramid pooling,SSPP)模块,以充分融合网络的高阶多尺度特征信息,增强模型对多尺度目标的检测能力。在head部分设计了非对称解耦检测头(asymmetric decoupling detection head,ADDH)模块,使模型分类更关注于中心内容,而回归更关注于边缘信息。试验结果表明,在PlantCLEF2022公共数据集中选取的17种果树的数据集中,改进的YOLOv8s模型对果树果实和叶片器官识别的平均精度均值为90.2%,比YOLOv8s模型高6.7个百分点。此外,该研究还将该模型应用到自建的枣数据集上,达到了99.1%的识别准确率,较原模型提升6.6个百分点,证明了所提出方法的通用性,可为常见果树的器官分割与基于多器官特征的细粒度品种分类研究提供参考。

关键词：图像处理图像分割果树多器官 YOLOv8s 多尺度目标识别

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