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XB-SIM*:A Simulation Framework for Modeling and Exploration of ReRAM-Based CNN Acceleration Design

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tsinghua science and technology 2021年第3期26卷 322-334页

作者： Xiang Fei youhui zhang weimin zheng department of computer science and technology Tsinghua UniversityBeijing 100084China beij.ng National Research Center for Information science and technology Beijing 100084China

Resistive Random Access Memory(ReRAM)-based neural network accelerators have potential to surpass their digital counterparts in computational efficiency and ***,design of these accelerators faces a number of challenges including imperfections of the Re RAM device and a large amount of calculations required to accurately simulate the *** present XB-SIM,a simulation framework for Re RAM-crossbar-based Convolutional Neural Network(CNN)***-SIM can be flexibly configured to simulate the accelerator’s structure and clock-driven behaviors at the architecture *** framework also includes an Re RAM-aware Neural Network(NN)training algorithm and a CNN-oriented mapper to train an NN and map it onto the simulated design *** of the simulator has been verified by the corresponding circuit simulation of a real ***,a batch processing mode of the massive calculations that are required to mimic the behavior of Re RAM-crossbar circuits is proposed to fully apply the computational concurrency of the mapping *** CPU/GPGPU,this batch processing mode can improve the simulation speed by up to 5.02 or *** this framework,comprehensive architectural exploration and end-to-end evaluation have been achieved,which provide some insights for systemic optimization.

关键词： deep neural network Resistive Random Access Memory(Re RAM) simulation accelerator processing in memory

Towards“General Purpose”Brain-Inspired Computing System

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tsinghua science and technology 2021年第5期26卷 664-673页

作者： youhui zhang Peng Qu weimin zheng the department of computer science and technology Tsinghua UniversityBeijing 100084China

Brain-inspired computing refers to computational models,methods,and systems,that are mainly inspired by the processing mode or structure of brain.A recent study proposed the concept of"neuromorphic completeness"and the corresponding system hierarchy,which is helpful to determine the capability boundary of brain-inspired computing system and to judge whether hardware and software of brain-inspired computing are compatible with each *** a position paper,this article analyzes the existing brain-inspired chips design characteristics and the current so-called"general purpose"application development frameworks for brain-inspired computing,as well as introduces the background and the potential of this ***,some key features of this concept are presented through the comparison with the Turing completeness and approximate computation,and the analyses of the relationship with"general-purpose"brain-inspired computing systems(it means that computing systems can support all computable applications).In the end,a promising technical approach to realize such computing systems is introduced,as well as the on-going research and the work *** believe that this work is conducive to the design of extensible neuromorphic complete hardware-primitives and the corresponding *** this basis,it is expected to gradually realize"general purpose"brain-inspired computing system,in order to take into account the functionality completeness and application efficiency.

关键词： brain-inspired computing neuromorphic computing computational completeness hardware/software decoupling system hierarchy

Hardware Implementation of Spiking Neural Networks on FPGA

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tsinghua science and technology 2020年第4期25卷 479-486页

作者： Jianhui Han Zhaolin Li weimin zheng youhui zhang the Institute of Microelectronics Tsinghua UniversityBeijing 100084China the Research Institute of Information technology Tsinghua UniversityBeijing 100084China the department of computer science and technology Tsinghua UniversityBeijing 100084China

Inspired by real biological neural models,Spiking Neural Networks(SNNs)process information with discrete spikes and show great potential for building low-power neural network *** paper proposes a hardware implementation of SNN based on Field-Programmable Gate Arrays(FPGA).It features a hybrid updating algorithm,which combines the advantages of existing algorithms to simplify hardware design and improve *** proposed design supports up to 16384 neurons and 16.8 million synapses but requires minimal hardware resources and archieves a very low power consumption of 0.477 W.A test platform is built based on the proposed design using a Xilinx FPGA evaluation board,upon which we deploy a classification task on the MNIST *** evaluation results show an accuracy of 97.06%and a frame rate of 161 frames per second.

关键词： Spiking Neural Network(SNN) Field-Programmable Gate Arrays(FPGA) digital circuit low-power MNIST

Employing intelligence in object-based storage devices to provide attribute-based file access

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science china(Information sciences) 2013年第3期56卷 169-178页

作者： zhang youhui QIAN ZiQiang zheng weimin department of computer science and technology Tsinghua University

Attribute-based file access has been regarded as a promising method to reach files based on their attributes rather than through the usual directory hierarchy,which is especially meaningful for locating the target among mass of ***,because the attribute-based file system introduces higher performance overhead and is usually incompatible with existing file access interfaces,till now there are few practical attribute-based file *** paper designs a file system with attribute-based access methods and a compatible access interface,using object-based storage devices(OSD).In detail,this design fully utilizes existing features of the OSD standard(T10):object attributes and access methods are mapped into file attributes and the corresponding access interfaces respectively;collection-objects are used for fast indexing of user ***,the attribute-based object organization can be achieved in OSD efficiently and the powerful processing capability of OSD is used to complete object-queries to speed up the ***,the way to export the new accessing methods through file system with a compatible interface is also *** a prototype has been *** show that it introduces much less overheads than some existing attribute-based file systems,and the query performance is higher than its counterpart based on the block-level device.

关键词： attribute-based file access object-based storage device intelligent storage

AIP:a tool for flexible and transparent data management

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science china(Information sciences) 2013年第5期56卷 191-201页

作者： zhang GuangYan QIU JianPing SHU JiWu zheng weimin department of computer science and technology Tsinghua University tsinghua National Laboratory for Information science and technology Tsinghua University

Existing data management tools have some limitations such as restrictions to specific file systems or shortage of transparence to *** this paper,we present a new data management tool called AIP,which is implemented via the standard data management API,and hence it supports multiple file systems and makes data management operations transparent to ***,AIP provides centralized policy-based data management for controlling the placement of files in different storage ***,AIP uses differentiated collections of file states to improve the execution efficiency of data management policies,with the help of the caching mechanism of file ***,AIP also provides a resource arbitration mechanism for controlling the rate of initiated data management *** results from representative experiments demonstrate that AIP has the ability to provide high performance,to introduce low management overhead,and to have good scalability.

关键词： data management DMAPI management policy differentiated collection resource arbitration

Characterizing and optimizing TPC-C workloads on large-scale systems using SSD arrays

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science china(Information sciences) 2016年第9期59卷 33-46页

作者： Jidong ZHAI Feng zhang Qingwen LI Wenguang CHEN weimin zheng department of computer science and technology Tsinghua University

Transaction processing performance council benchmark C(TPC-C) is the de facto standard for evaluating the performance of high-end computers running on-line transaction processing applications. Differing from other standard benchmarks, the transaction processing performance council only defines specifications for the TPC-C benchmark, but does not provide any standard implementation for end-users. Due to the complexity of the TPC-C workload, it is a challenging task to obtain optimal performance for TPC-C evaluation on a large-scale high-end computer. In this paper, we designed and implemented a large-scale TPC-C evaluation system based on the latest TPC-C specification using solid-state drive(SSD) storage devices. By analyzing the characteristics of the TPC-C workload, we propose a series of system-level optimization methods to improve the TPC-C performance. First, we propose an approach based on Small File table space to organize the test data in a round-robin method on all of the disk array partitions; this can make full use of the underlying disk ***, we propose using a NOOP-based disk scheduling algorithm to reduce the utilization rate of processors and improve the average input/output service time. Third, to improve the system translation lookaside buffer hit rate and reduce the processor overhead, we take advantage of the huge page technique to manage a large amount of memory resources. Lastly, we propose a locality-aware interrupt mapping strategy based on the asymmetry characteristic of non-uniform memory access systems to improve the system performance. Using these optimization methods, we performed the TPC-C test on two large-scale high-end computers using SSD arrays. The experimental results show that our methods can effectively improve the TPC-C performance. For example, the performance of the TPC-C test on an Intel Westmere server reached 1.018 million transactions per minute.

关键词： TPC-C benchmark OLTP workload performance analysis performance optimization high-end computers

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基于忆阻器的近似计算方法

清华大学学报（自然科学版） 2021年第6期61卷 610-617页

作者：季宇张悠慧郑纬民清华大学计算机科学与技术系北京信息科学与技术国家研究中心北京100084

忆阻器是一种非易失性存储器件,目前主要有两种方法用忆阻器实现通用计算:通过忆阻器交叉开关阵列支持神经网络来逼近任意函数;用忆阻器构造基础的门电路,再进一步实现任意Boole逻辑计算。前者存在误差难以控制的问题,后者相比传统数字... 详细信息

忆阻器是一种非易失性存储器件,目前主要有两种方法用忆阻器实现通用计算:通过忆阻器交叉开关阵列支持神经网络来逼近任意函数;用忆阻器构造基础的门电路,再进一步实现任意Boole逻辑计算。前者存在误差难以控制的问题,后者相比传统数字电路优势不显著。该文设计了一种针对忆阻器的通用近似计算范式,基于忆阻器的硬件架构通用现场可编程突触阵列(GP-FPSA),结合了两种方法的优点来实现基于忆阻器的高效且误差可控的通用近似计算。在具体设计上,充分考虑了神经网络近似能力的限制,通过万能近似器来解决直接训练神经网络误差过大且不可控的问题,并结合控制流实现了复杂函数的拆分,降低近似构造的开销,最后通过基于忆阻器的架构设计,使得通用计算能力大幅提升。

关键词：近似计算神经网络万能近似器忆阻器

Solaris系统多线程检查点设置与卷回恢复

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计算机工程与应用 2000年第8期36卷 45-47页

作者：张悠慧汪东升郑纬民清华大学计算机系北京100084

文章利用UNIX进程检查点设置思想，结合多线程在Solaris系统中的实现特点，提出了一种适合于Solaris操作系统的多线程检查点设置与恢复技术，其检查点设置与恢复技术具有在用户级实现、对用户透明和简单高效的特点。文章主要介绍检查点... 详细信息

文章利用UNIX进程检查点设置思想，结合多线程在Solaris系统中的实现特点，提出了一种适合于Solaris操作系统的多线程检查点设置与恢复技术，其检查点设置与恢复技术具有在用户级实现、对用户透明和简单高效的特点。文章主要介绍检查点信息的保存与恢复、函数换名、包裹，线程号映射等关键技术。

关键词： Solaris系统 UNIX 多线和检查点设置卷回恢复

Fixing, preventing, and recovering from concurrency bugs

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science china(Information sciences) 2015年第5期58卷 58-75页

作者： DEng DongDong JIN GuoLiang de KRUIJF Marc LI Ang LIBLIT Ben LU Shan QI ShanXiang REN JingLei SANKARALIngAM Karthikeyan SOng LinHai WU YongWei zhang MingXing zhang Wei zheng weimin computer science department University of Wisconsin Google computer science department University of Chicago tsinghua National Laboratory for Information science and technology Tsinghua University IBM Research

Concurrency bugs are becoming widespread with the emerging ubiquity of multicore processors and multithreaded software. They manifest during production runs and lead to severe losses. Many effective concurrency-bug detection tools have been built. However, the dependability of multi-threaded software does not improve until these bugs are handled statically or dynamically. This article discusses our recent progresses on fixing, preventing, and recovering from concurrency bugs.

关键词： concurrency bugs bug detection production run performance counters