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Global-to-Local Approach to Rigorously Developing Distributed System with Exception Handling

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Journal of Computer Science & Technology 2009年第2期24卷 238-249页

作者：蔡超裘宗燕 Senior member, member, ccf, IEEE 杨红丽赵翔鹏 LMAM and Department of Informatics School of Mathematical Science Peking University Beijing 100871 China College of Computer Sciences Beijing University of Technology Beijing 100124 China

Cooperative distributed system covers a wide range of applications such as the systems for industrial controlling and business-to-business trading, which are usually safety-critical. Coordinated exception handling （CEH） refers to exception handling in the cooperative distributed systems, where exceptions raised on a peer should be dealt with by all relevant peers in a consistent manner. Some CEH algorithms have been proposed. A crucial problem in using these algorithms is how to develop the peers which are guaranteed coherent in both normal execution and exceptional execution. Straightforward testing or model checking is very expensive. In this paper, we propose an effective way to rigorously develop the systems with correct CEH behavior. Firstly, we formalize the CEH algorithm by proposing a Peer Process Language to precisely describe the distributed systems and their operational semantics. Then we dig out a set of syntactic conditions, and prove its sufficiency for system coherence. Finally~ we propose a global-to-local approach, including a language describing the distributed systems from a global perspective and a projection algorithm, for developing the systems. Given a well-formed global description, a set of peers can be generated automatically. We prove the system composed of these peers satisfies the conditions, that is, it is always coherent and correct for CEH.

关键词： distributed system exception handling fault tolerant formal methods

A Novel Spatial Pooling Strategy for Image Quality Assessment

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Journal of Computer Science & Technology 2016年第2期31卷 225-234页

作者： Qiaohong Li Yu-Ming Fang member, ccf Jing-Tao Xu School of Computer Engineering Nanyang Technological University Singapore 639798 Singapore School of Information Technology Jiangxi University of Finance and Economics Nanchang 330013 China School of Information and Communication Engineering Beijing University of Posts and Telecommunications Beijing 100086 China

A variety of existing image quality assessment （IQA） metrics share a similar two-stage framework： at the first stage, a quality map is constructed by comparison between local regions of reference and distorted images; at the second stage, the spatial pooling is adopted to obtain overall quality score. In this work, we propose a novel spatial pooling strategy for image quality assessment through statistical analysis of the quality map. Our in-depth analysis indicates that the overall image quality is sensitive to the quality distribution. Based on the analysis, the quality histogram and statistical descriptors extracted from the quality map are used as input to the support vector regression to obtain the final objective quality score. Experimental results on three large public IQA databases have demonstrated that the proposed spatial pooling strategy can greatly improve the quality prediction performance of the original IQA metrics in terms of correlation with human subjective ratings.

关键词： image quality assessment spatial pooling statistical pooling support vector regression structural similarity

CCNoC:Cache-Coherent Network on Chip for Chip Multiprocessors

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Journal of Computer Science & Technology 2010年第2期25卷 257-266页

作者：王惊雷薛一波 member, ccf, IEEE 王海霞李崇民汪东升 Senior member,ccf Department of Computer Science and Technology Tsinghua University Beijing 100084 China Tsinghua National Laboratory of Information Science and Technology Beijing 100084 China

As the number of cores in chip multiprocessors （CMPs） increases, cache coherence protocol has become a key issue in integration of chip multiprocessors. Supporting cache coherence protocol in large chip multiprocessors still faces three hurdles： design complexity, performance and scalability. This paper proposes Cache Coherent Network on Chip （CCNoC）, a scheme that decouples cache coherency maintenance from processors and shared L2 caches and implements it completely in network on chip to free up processors and shared L2 caches from the chore of maintaining coherency, thereby reduces design complexity of CMPs. In this way, CCNoC also improves the performance of cache coherence protocol through reducing directory access latency and enhances scalability by avoiding massive directories overhead in shared L2 caches. In CCNoC, coherence state caches and active directory caches are implemented in the network interface components of network on chip to maintain cache coherence states for blocks in L1 caches and manage directory information for recently accessed blocks in L2 caches respectively. CCNoC provides a scalable CMP framework to tackle cache coherency which is the foundation of CMP. This paper evaluates the performance of CCNoC. Experimental results show that for a 16-core system, CCNoC improves performance by 3% on average over the conventional chip multiprocessor and by 10% at best, while reduces storage overhead by 1.8% and saves directory storage by 88%, showing good scalability.

关键词： chip multiprocessor network on chip cache coherence protocol

Providing Virtual Cloud for Special Purposes on Demand in JointCloud Computing Environment

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Journal of Computer Science & Technology 2017年第2期32卷 211-218页

作者： Dong-Gang Cao member, ccf, IEEE, Bo An Pei-Chang Shi Huai-Min Wang Key Laboratory of High Confidence Software Technologies (Peking University) Ministry of Education Beijing 100871 China National Key Laboratory for Parallel and Distributed Processing National University of Defense and Technology Changsha 410073 China

Cloud computing has been widely adopted by enterprises because of its on-demand and elastic resource usage paradigm. Currently most cloud applications are running on one single cloud. However, more and more applications demand to run across several clouds to satisfy the requirements like best cost efficiency, avoidance of vender lock-in, and geolocation sensitive service. JointCloud computing is a new research initiated by Chinese institutes to address the computing issues concerned with multiple clouds. In JointCloud, users＇ diverse and dynamic requirements on cloud resources axe satisfied by providing users virtual cloud （VC） for special purposes. A virtual cloud for special purposes is in essence a user＇s specific cloud working environment having the customized software stacks, configurations and computing resources readily available. This paper first introduces what is JointCloud computing and then describes the design rationales, motivation examples, mechanisms and enabling technologies of VC in JointCloud.

关键词： cloud computing JointCloud virtual cloud (VC) cloud working environment

HAG： An Energy-Proportional Data Storage Scheme for Disk Array Systems

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Journal of Computer Science & Technology 2015年第4期30卷 679-695页

作者：金培权谢希科 Christian S. Jensen 金勇岳丽华 School of Computer Science and Technology University of Science and Technology of China Hefei 230027 China Key Laboratory of Electromagnetic Space Information Chinese Academy of Sciences Hefei 230027 China Department of Computer Science Aalborg University Aalborg DK-9220 Denmark

Energy consumption has been a critical issue for data storage systems, especially for modern data centers. A recent survey has showed that power costs amount to about 50%of the total cost of ownership in a typical data center, with about 27% of the system power being consumed by storage systems. This paper aims at providing an effective solution to reducing the energy consumed by disk storage systems, by proposing a new approach to reduce the energy consumption. Differing from previous approaches, we adopt two new designs. 1） We introduce a hotness-aware and group-based system model （HAG） to organize the disks, in which all disks are partitioned into a hot group and a cold group. We only make file migration between the two groups and avoid the migration within a single group, so that we are able to reduce the total cost of file migration. 2） We use an on-demand approach to reorganize files among the disks that is based on workload change as well as the change of data hotness. We conduct trace-driven experiments involving two real and nine synthetic traces and we make detailed comparisons between our method and competitor methods according to different metrics. The results show that our method can dynamically select hot files and disks when the workload changes and that it is able to reduce energy consumption for all the traces. Furthermore, its time performance is comparable to that of the compared algorithms. In general, our method exhibits the best energy e？ciency in all experiments, and it is capable of maintaining an improved trade-off between performance and energy consumption.

关键词： energy-aware system file organization storage management

Tetris:A Heuristic Static Memory Management Framework for Uniform Memory Multicore Neural Network Accelerators

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Journal of Computer Science & Technology 2022年第6期37卷 1255-1270页

作者： Xiao-Bing Chen Hao Qi Shao-Hui Peng Yi-Min Zhuang Tian Zhi Yun-Ji Chen Distinguished member,ccf State Key Laboratory of Computer Architecture Institute of Computing TechnologyChinese Academy of SciencesBeijing 100190China University of Chinese Academy of Sciences Beijing 100049China School of Computer Science and Technology University of Science and Technology of ChinaHeFei230026China Chinese Academy of Sciences Center for Excellence in Brain Science and Intelligence Technology Shanghai200031China 不详

Uniform memory multicore neural network accelerators(UNNAs)furnish huge computing power to emerging neural network ***,with neural network architectures going deeper and wider,the limited memory capacity has become a constraint to deploy models on UNNA *** how to efficiently manage memory space and how to reduce workload footprints are urgently *** this paper,we propose Tetris:a heuristic static memory management framework for UNNA *** reconstructs execution flows and synchronization relationships among cores to analyze each tensor’s liveness *** the memory management problem is converted to a sequence permutation *** uses a genetic algorithm to explore the permutation space to optimize the memory management strategy and reduce memory *** evaluate several typical neural networks and the experimental results demonstrate that Tetris outperforms the state-of-the-art memory allocation methods,and achieves an average memory reduction ratio of 91.9%and 87.9%for a quad-core and a 16-core Cambricon-X platform,respectively.

关键词： multicore neural network accelerators liveness analysis static memory management memory reuse genetic algorithm

Clustering Context-Dependent Opinion Target Words in Chinese Product Reviews

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Journal of Computer Science & Technology 2015年第5期30卷 1109-1119页

作者：张宇刘妙夏海霞 School of Information Science and Technology Zhejiang Sci-Tech University Hangzhou 310018 China

In opinion mining of product reviews, an important task is to provide a summary of customers＇ opinions based on different opinion targets. Due to various knowledge backgrounds or linguistic habits, customers use a variety of terms to describe the same opinion target. These terms are called as context-dependent synonyms. In order to provide a comprehensive summary, the first step is to classify these opinion target words into groups. In this article, we mainly focus on clustering context-dependent opinion target words in Chinese product reviews. We utilize three clustering methods based on distributional similarity and use four different co-occurrence matrices for experiments. According to the experimental results on a large number of reviews, we find that our proposed heuristic k-means clustering method using opinion target words co-occurrence matrix achieves the best clustering result with lower time complexity and less memory space. In addition, the accuracy is more stable when choosing different combinations of centroids. For some kinds of co-occurrence matrices, we also find that using small-size （low-dimensional） matrices achieves higher average clustering accuracy than using large-size （high-dimensional） matrices. Our findings provide a time-efficient and space-efficient way to cluster opinion targets with high accuracy.

关键词： clustering context-dependent opinion target word product review opinion mining

Assisting Visually Impaired People to Acquire Targets on a Large Wall-Mounted Display

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Journal of Computer Science & Technology 2014年第5期29卷 825-836页

作者： Kibum Kim member ACM IEEE 任向实 Senior member Center for Human Computer Interaction Kochi University of Technology Kochi 782-8502 Japan

Large displays have become ubiquitous in our everyday lives, but these displays are designed for sighted *** paper addresses the need for visually impaired people to access targets on large wall-mounted displays. We developed an assistive interface which exploits mid-air gesture input and haptic feedback, and examined its potential for pointing and steering tasks in human computer interaction（HCI）. In two experiments, blind and blindfolded users performed target acquisition tasks using mid-air gestures and two different kinds of feedback（i.e., haptic feedback and audio feedback）. Our results show that participants perform faster in Fitts＇ law pointing tasks using the haptic feedback interface rather than the audio feedback interface. Furthermore, a regression analysis between movement time（MT） and the index of difficulty（ID）demonstrates that the Fitts＇ law model and the steering law model are both effective for the evaluation of assistive interfaces for the blind. Our work and findings will serve as an initial step to assist visually impaired people to easily access required information on large public displays using haptic interfaces.

关键词： haptic I/O auditory(non-speech) feedback interaction style human computer interaction visually impaired people

Parallel LDPC Decoding on GPUs Using a Stream-Based Computing Approach

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Journal of Computer Science & Technology 2009年第5期24卷 913-924页

作者： Gabriel Falcao Student member Shinichi Yamagiwa Vitor Silva Leonel Sousa Senior member Department of Electrical and Computer Engineering University of Coimbra Instituto de Telecomunicacoes PoloⅡUniversidade de Coimbra 3030-290 Coimbra Portugal INESC-ID Technical University of Lisbon Rua Alves Redol n.9 1000-029 Lisboa Portugal Department of Electrical and Computer Engineering IST Technical University of Lisbon Rua Alves Redol n.9 1000-029 Lisboa Portugal

Low-Density Parity-Check （LDPC） codes are powerful error correcting codes adopted by recent communication standards. LDPC decoders are based on belief propagation algorithms, which make use of a Tanner graph and very intensive message-passing computation, and usually require hardware-based dedicated solutions. With the exponential increase of the computational power of commodity graphics processing units （GPUs）, new opportunities have arisen to develop general purpose processing on GPUs. This paper proposes the use of GPUs for implementing flexible and programmable LDPC decoders. A new stream-based approach is proposed, based on compact data structures to represent the Tanner graph. It is shown that such a challenging application for stream-based computing, because of irregular memory access patterns, memory bandwidth and recursive flow control constraints, can be efficiently implemented on GPUs. The proposal was experimentally evaluated by programming LDPC decoders on GPUs using the Caravela platform, a generic interface tool for managing the kernels＇ execution regardless of the GPU manufacturer and operating system. Moreover, to relatively assess the obtained results, we have also implemented LDPC decoders on general purpose processors with Streaming Single Instruction Multiple Data （SIMD） Extensions. Experimental results show that the solution proposed here efficiently decodes several codewords simultaneously, reducing the processing time by one order of magnitude.

关键词： data-parallel computing graphics processing unit (GPU) Caravela low-density parity-check (LDPC) code error correcting code