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MIMO Hardware Simulator: Algorithm Design for Heterogeneous Environments

Circuits and Systems 2013年第2期4卷 217-226页

作者： Bachir Habib gheorghe zaharia Ghais El Zein Institute of Electronics and Telecommunications of Rennes Rennes France

A wireless communication system can be tested either in actual conditions or by a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel and making it possible to test “on table” mobile radio equipment. This paper presents an architecture for the digital block of a hardware simulator of MIMO propagation channels. This simulator can be used for LTE and WLAN IEEE 802.11ac applications, in indoor and outdoor environments. However, in this paper, specific architecture of the digital block of the simulator is presented to characterize a scenario indoor to outdoor using TGn channel models. The switching between each environment in the scenario must be made in a continuous manner. Therefore, an algorithm is designed to pass from a considered impulse response in the environment to another in other environment. The architecture of the digital block of the hardware simulator is presented and implemented on a Xilinx Virtex-IV FPGA. Moreover, the impulse responses are transferred into the simulator. The accuracy, the occupation on the FPGA and the latency of the architecture are analyzed.

关键词： Hardware Simulator MIMO Radio Channel FPGA 802.11ac Signal Time-Varying TGn Channel Models

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Auto-Scale Factor Circuit Realisation for MIMO Hardware Simulator

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Circuits and Systems 2013年第4期4卷 369-385页

作者： Bachir Habib gheorghe zaharia Ghais El Zein Institute of Electronics and Telecommunications of Rennes (IETR) Rennes France

A hardware simulator reproduces the behavior of the radio propagation channel, thus making it possible to test “on table” the mobile radio equipments. The simulator can be used for LTE and WLAN 802.11ac applications, in indoor and outdoor environments. In this paper, the input signals parameters and the relative power of the impulse responses are related to the relative error and SNR of the output signals. After analyzing the influence of these parameters on the output error and SNR, an algorithm based on an Auto-Scale Factor (ASF) is analyzed in details to improve the precision of the output signals of the hardware simulator digital block architecture. Moreover, the circuit needed for the validation of this algorithm has been introduced, verified and realized. It is shown that this solution increases the output SNR if the relative powers of the impulse responses are attenuated. The new architecture of the digital block is presented and implemented on a Xilinx Virtex-IV FPGA. The occupation on the FPGA and the accuracy of the architecture are analyzed.

关键词： Hardware Simulator FPGA MIMO Radio Channel 802.11ac LTE

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MIMO Hardware Simulator Using Standard Channel Models and Measurement Data at 2,2 and 3,5 GHz

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通讯和计算机（中英文版） 2013年第4期10卷 525-544页

作者： Bachir Habib gheorghe zaharia Hanna Farhat Gha'fs El Zein Institute of Electronics and Telecommunications of Rennes IETR UMR CNRS 6164 Rennes 35708 France

A wireless communication system can be tested either in actual conditions or by using a hardware simulator reproducing actual conditions. With a hardware simulator it is possible to freely simulate a desired type of a radio channel. This paper presents architectures for the digital block of a hardware simulator of MIMO (multiple-input multiple-output) propagation channels. This simulator can be used for LTE (long term evolution system) and WLAN (wireless local area networks) 802.11ac applications, in indoor and outdoor environments. The first architecture is appropriate for shipboard environments, while the second corresponds to outdoor-to-indoor environments and considers the wave propagation penetration within buildings. Measurements campaigns carried out at 2.2 and 3.5 GHz have been conducted to obtain the impulse responses of the channel using a MIMO channel sounder designed at IETR. The measurements are processed with an algorithm extracting the dominant paths. The architectures of the digital block are implemented on a Xilinx Virtex-IV FPGA (field programmable gate array). After the implementation of the impulse responses, the accuracy, the occupation on the FPGA and the latency of the architectures are analyzed.

关键词：硬件仿真器 MIMO 测量数据 GHz 信道模型使用标准现场可编程门阵列无线通信系统

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